Lines Matching refs:u32
119 u32 AddrLow;
120 u32 GenerationBit: 1;
121 u32 BufferLength: 31;
122 u32 RespQueueSelector: 4;
123 u32 ResponseTokens: 12;
124 u32 CmdId: 8;
125 u32 Reserved: 3;
126 u32 TokenValid: 1;
127 u32 Eop: 1;
128 u32 Sop: 1;
129 u32 DataValid: 1;
130 u32 GenerationBit2: 1;
131 u32 AddrHigh;
139 u32 BufferLength: 31;
140 u32 GenerationBit: 1;
141 u32 AddrLow;
142 u32 AddrHigh;
143 u32 GenerationBit2: 1;
144 u32 DataValid: 1;
145 u32 Sop: 1;
146 u32 Eop: 1;
147 u32 TokenValid: 1;
148 u32 Reserved: 3;
149 u32 CmdId: 8;
150 u32 ResponseTokens: 12;
151 u32 RespQueueSelector: 4;
162 u32 Qsleeping: 4;
163 u32 Cmdq1CreditReturn: 5;
164 u32 Cmdq1DmaComplete: 5;
165 u32 Cmdq0CreditReturn: 5;
166 u32 Cmdq0DmaComplete: 5;
167 u32 FreelistQid: 2;
168 u32 CreditValid: 1;
169 u32 DataValid: 1;
170 u32 Offload: 1;
171 u32 Eop: 1;
172 u32 Sop: 1;
173 u32 GenerationBit: 1;
174 u32 BufferLength;
182 u32 BufferLength;
183 u32 GenerationBit: 1;
184 u32 Sop: 1;
185 u32 Eop: 1;
186 u32 Offload: 1;
187 u32 DataValid: 1;
188 u32 CreditValid: 1;
189 u32 FreelistQid: 2;
190 u32 Cmdq0DmaComplete: 5;
191 u32 Cmdq0CreditReturn: 5;
192 u32 Cmdq1DmaComplete: 5;
193 u32 Cmdq1CreditReturn: 5;
194 u32 Qsleeping: 4;
205 u32 AddrLow;
206 u32 GenerationBit: 1;
207 u32 BufferLength: 31;
208 u32 Reserved: 31;
209 u32 GenerationBit2: 1;
210 u32 AddrHigh;
218 u32 BufferLength: 31;
219 u32 GenerationBit: 1;
220 u32 AddrLow;
221 u32 AddrHigh;
222 u32 GenerationBit2: 1;
223 u32 Reserved: 31;
246 u32 cq_credits; /* # available descriptors for Xmit */
247 u32 cq_asleep; /* HW DMA Fetch status */
248 u32 cq_pio_pidx; /* Variable updated on Doorbell */
249 u32 cq_entries_n; /* # entries for Xmit */
250 u32 cq_pidx; /* producer index (SW) */
251 u32 cq_complete; /* Shadow consumer index (HW) */
252 u32 cq_cidx; /* consumer index (HW) */
253 u32 cq_genbit; /* current generation (=valid) bit */
266 u32 fq_id; /* 0 queue 0, 1 queue 1 */
267 u32 fq_credits; /* # available RX buffer descriptors */
268 u32 fq_entries_n; /* # RX buffer descriptors */
269 u32 fq_pidx; /* producer index (SW) */
270 u32 fq_cidx; /* consumer index (HW) */
271 u32 fq_genbit; /* current generation (=valid) bit */
272 u32 fq_rx_buffer_size; /* size buffer on this freelist */
278 u32 fq_pause_on_thresh;
279 u32 fq_pause_off_thresh;
286 u32 rq_credits; /* # avail response Q entries */
287 u32 rq_credits_pend; /* # not yet returned entries */
288 u32 rq_credits_thresh; /* return threshold */
289 u32 rq_entries_n; /* # response Q descriptors */
290 u32 rq_pidx; /* producer index (HW) */
291 u32 rq_cidx; /* consumer index (SW) */
292 u32 rq_genbit; /* current generation(=valid) bit */
456 extern u32 t1_sge_get_ptimeout(ch_t *);
457 extern void t1_sge_set_ptimeout(ch_t *, u32);