Lines Matching refs:pci_phys_hi
892 offset = PCI_REG_REG_G(reg[i].pci_phys_hi);
893 switch (PCI_REG_ADDR_G(reg[i].pci_phys_hi)) {
1040 switch (PCI_REG_ADDR_G(reg[i].pci_phys_hi)) {
1051 range.par_phys_hi = reg[i].pci_phys_hi |
2092 switch (PCI_REG_ADDR_G(pci_rp[i].pci_phys_hi)) {
2103 PCI_REG_REG_G(pci_rp[i].pci_phys_hi));
2121 PCI_REG_REG_G(pci_rp[i].pci_phys_hi));
2135 PCI_REG_REG_G(pci_rp[i].pci_phys_hi));
2280 switch (PCI_REG_ADDR_G(assigned[i].pci_phys_hi)) {
2287 PCI_REG_REG_G(assigned[i].pci_phys_hi));
2298 PCI_REG_REG_G(assigned[i].pci_phys_hi));
2308 PCI_REG_REG_G(assigned[i].pci_phys_hi));
3205 PCI_REG_BUS_G(reg->pci_phys_hi),
3206 PCI_REG_DEV_G(reg->pci_phys_hi),
3207 PCI_REG_FUNC_G(reg->pci_phys_hi));
3214 PCI_REG_BUS_G(reg->pci_phys_hi),
3215 PCI_REG_DEV_G(reg->pci_phys_hi),
3216 PCI_REG_FUNC_G(reg->pci_phys_hi),
3217 reg->pci_phys_hi, (void *) cfgaddr);
3241 PCI_REG_BUS_G(reg->pci_phys_hi),
3242 PCI_REG_DEV_G(reg->pci_phys_hi),
3243 PCI_REG_FUNC_G(reg->pci_phys_hi));
3391 addition.pci_phys_hi = hi_type |
3392 PCICFG_MAKE_REG_HIGH(PCI_REG_BUS_G(reg->pci_phys_hi),
3393 PCI_REG_DEV_G(reg->pci_phys_hi),
3394 PCI_REG_FUNC_G(reg->pci_phys_hi), 0);
3536 hiword = PCICFG_MAKE_REG_HIGH(PCI_REG_BUS_G(reg->pci_phys_hi),
3537 PCI_REG_DEV_G(reg->pci_phys_hi),
3538 PCI_REG_FUNC_G(reg->pci_phys_hi),
3564 addition.pci_phys_hi = hiword;