Lines Matching refs:bctrl

4028 	uint16_t comm, stat, bctrl;
4032 bctrl = pci_config_get16(config_handle, PCI_CBUS_BRIDGE_CTRL);
4048 if (!(bctrl & PCI_BCNF_BCNTRL_RESET))
4050 bctrl | PCI_BCNF_BCNTRL_RESET);
4052 bctrl &= ~PCI_BCNF_BCNTRL_RESET;
4057 bctrl |= (PCI_BCNF_BCNTRL_PARITY_ENABLE | PCI_BCNF_BCNTRL_SERR_ENABLE |
4064 bctrl |= PCI_BCNF_BCNTRL_B2B_ENAB;
4066 pci_config_put16(config_handle, PCI_CBUS_BRIDGE_CTRL, bctrl);
4068 "enable_pci_pci_bridge stat 0x%04x comm 0x%04x bctrl 0x%04x\n",
4069 stat, comm, bctrl);
4077 uint16_t comm, stat, bctrl;
4081 bctrl = pci_config_get16(config_handle, PCI_CBUS_BRIDGE_CTRL);
4097 if (!(bctrl & PCI_BCNF_BCNTRL_RESET))
4099 bctrl | PCI_BCNF_BCNTRL_RESET);
4101 bctrl &= ~PCI_BCNF_BCNTRL_RESET;
4106 bctrl &= ~(CB_BCNF_BCNTRL_MEM0_PREF | CB_BCNF_BCNTRL_MEM1_PREF |
4112 bctrl |= (PCI_BCNF_BCNTRL_MAST_AB_MODE | CB_BCNF_BCNTRL_WRITE_POST);
4114 bctrl |= PCI_BCNF_BCNTRL_PARITY_ENABLE;
4116 bctrl |= PCI_BCNF_BCNTRL_SERR_ENABLE;
4118 pci_config_put16(config_handle, PCI_CBUS_BRIDGE_CTRL, bctrl);
4126 "enable_cardbus_bridge() stat 0x%04x comm 0x%04x bctrl 0x%04x\n",
4127 stat, comm, bctrl);
4137 uint16_t comm, bctrl;
4140 bctrl = pci_config_get16(config_handle, PCI_CBUS_BRIDGE_CTRL);
4151 bctrl &= ~(PCI_BCNF_BCNTRL_PARITY_ENABLE | PCI_BCNF_BCNTRL_SERR_ENABLE |
4156 pci_config_put16(config_handle, PCI_CBUS_BRIDGE_CTRL, bctrl);
4159 "disable_pci_pci_bridge() stat 0x%04x comm 0x%04x bctrl 0x%04x\n",
4160 pci_config_get16(config_handle, PCI_CONF_STAT), comm, bctrl);
4166 uint16_t comm, bctrl;
4169 bctrl = pci_config_get16(config_handle, PCI_CBUS_BRIDGE_CTRL);
4180 bctrl &= ~(PCI_BCNF_BCNTRL_PARITY_ENABLE | PCI_BCNF_BCNTRL_SERR_ENABLE |
4188 pci_config_put16(config_handle, PCI_CBUS_BRIDGE_CTRL, bctrl);
4191 "disable_cardbus_bridge() stat 0x%04x comm 0x%04x bctrl 0x%04x\n",
4192 pci_config_get16(config_handle, PCI_CONF_STAT), comm, bctrl);