Lines Matching refs:len
132 uint64_t len, char *busra_type);
134 uint64_t len, char *busra_type);
359 ndi_ra_free(dev_info_t *dip, uint64_t base, uint64_t len, char *type,
369 if (len == 0) {
385 newend = base + len;
405 mapp->ra_len += len;
413 mapp->ra_len += len;
428 newmap->ra_len = len;
438 newmap->ra_len = len;
448 (void) pci_put_available_prop(dipmap->ra_dip, base, len, type);
460 cmn_err(CE_NOTE, "!ndi_ra_free: freeing base 0x%" PRIx64 ", len 0x%"
462 ", len 0x%" PRIx64 "\n", base, len, overlapmap->ra_base,
491 uint64_t base, uint64_t len)
499 if ((mapp->ra_len - newlen) == len) {
506 newmap->ra_base = base + len;
507 newmap->ra_len = mapp->ra_len - (len + newlen);
513 mapp->ra_base += len;
514 mapp->ra_len -= len;
530 uint64_t len, remlen, largestbase, largestlen;
537 len = req->ra_len;
549 mask = (req->ra_flags & NDI_RA_ALIGN_SIZE) ? (len - 1) :
561 DEBUGPRT(CE_CONT, "ndi_ra_alloc: mapp = %p len=%" PRIx64 ", mask=%"
562 PRIx64 "\n", (void *)mapp, len, mask);
578 DEBUGPRT(CE_CONT, "ndi_ra_alloc: ra_len = %" PRIx64 ", len = %"
580 "\n", mapp->ra_len, len, mapp->ra_base, mask);
606 ", len = %" PRIx64 "", mapp->ra_len, len);
651 if (mapp->ra_len >= len) {
653 if ((len > (mapp->ra_len -
655 ((len - 1 + base) > upper)) {
663 adjust_link(backp, mapp, base, len);
672 len = req->ra_len;
681 if ((len > mapp->ra_len) ||
683 mapp->ra_len - len)) {
702 adjust_link(backp, mapp, base, len);
717 len = largestlen;
728 *retlenp = len;
758 uint32_t len;
762 uint32_t len;
766 int i, len;
805 req.ra_len = (uint64_t)iorange[i].len;
829 req.ra_len = (uint64_t)memrange[i].len;
857 len = (proplen / sizeof (uint32_t));
858 for (i = 0; i < len; i++) {
940 int len;
949 len = sizeof (bus_type);
952 (caddr_t)&bus_type, &len) != DDI_SUCCESS)
1082 len = sizeof (struct bus_range);
1084 "available-bus-range", (caddr_t)&pci_bus_range, &len) ==
1101 len = sizeof (struct bus_range);
1104 &len) == DDI_SUCCESS) {
1155 int len;
1162 len = sizeof (bus_type);
1165 (caddr_t)&bus_type, &len) != DDI_SUCCESS)
1173 len = sizeof (struct bus_range);
1175 "bus-range", (caddr_t)&pci_bus_range, &len) == DDI_SUCCESS) {
1320 pci_get_available_prop(dev_info_t *dip, uint64_t base, uint64_t len,
1365 (base + len > range_base + range_len)) {
1373 * range_base base base+len range_base
1396 dlen = (range_base + range_len) - (base + len);
1400 (uint32_t)((base + len)>> 32);
1402 (uint32_t)(base + len);
1436 "resource from dip %p : base 0x%" PRIx64 ", len 0x%" PRIX64
1437 ", type 0x%x\n", (void *)dip, base, len, type);
1471 pci_put_available_prop(dev_info_t *dip, uint64_t base, uint64_t len,
1480 uint64_t orig_len = len;
1526 if ((base + len < range_base) ||
1542 ASSERT((base + len == range_base) ||
1545 if ((base + len != range_base) &&
1549 "base 0x%" PRIx64 ", len 0x%" PRIx64 " "
1551 "base 0x%" PRIx64 ", len 0x%" PRIx64 "\n",
1565 * len range_len
1573 * range_len len
1584 "base 0x%" PRIx64 ", len 0x%" PRIx64 " "
1591 /* setup base & len to refer to the merged range */
1592 len += range_len;
1604 newregs[j].pci_size_hi = (uint32_t)(len >> 32);
1605 newregs[j].pci_size_low = (uint32_t)len;
1618 newregs[k].pci_size_hi = (uint32_t)(len >> 32);
1619 newregs[k].pci_size_low = (uint32_t)len;
1643 newregs[j].pci_size_hi = (uint32_t)(len >> 32);
1644 newregs[j].pci_size_low = (uint32_t)len;
1672 newregs[0].pci_size_hi = (uint32_t)(len >> 32);
1673 newregs[0].pci_size_low = (uint32_t)len;