Lines Matching defs:bar

341                       u8_t          bar)
357 bar++;
361 ddi_dev_regsize(pUM->pDev, bar, &regSize);
363 if ((size > regSize) || BnxeIsBarUsed(pUM, bar, 0, size))
366 bar, 0, (int)regSize);
373 bar, 0, (int)regSize);
378 bar, // bar number
386 bar, 0, size, rc);
392 pMem->regNumber = bar;
400 bar--;
401 pLM->vars.reg_handle[bar] = pMem->regAccess;
409 u8_t bar,
419 /* see bar mapping described in mm_map_io_base above */
420 bar++;
422 ddi_dev_regsize(pUM->pDev, bar, &regSize);
424 if ((size > regSize) || BnxeIsBarUsed(pUM, bar, offset, size))
427 bar, offset, (int)regSize);
434 bar, offset, (int)regSize);
439 bar, // bar number
447 bar, offset, size, rc);
453 pMem->regNumber = bar;
1548 u8_t bar,
1553 *ret = ddi_get8(pdev->vars.reg_handle[bar],
1554 (uint8_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] +
1560 u8_t bar,
1565 *ret = ddi_get16(pdev->vars.reg_handle[bar],
1566 (uint16_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] +
1572 u8_t bar,
1577 *ret = ddi_get32(pdev->vars.reg_handle[bar],
1578 (uint32_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] +
1584 u8_t bar,
1589 *ret = ddi_get64(pdev->vars.reg_handle[bar],
1590 (uint64_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] +
1596 u8_t bar,
1600 ddi_put8(pdev->vars.reg_handle[bar],
1601 (uint8_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] + offset),
1608 u8_t bar,
1612 ddi_put16(pdev->vars.reg_handle[bar],
1613 (uint16_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] + offset),
1620 u8_t bar,
1624 ddi_put32(pdev->vars.reg_handle[bar],
1625 (uint32_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] + offset),
1632 u8_t bar,
1636 ddi_put64(pdev->vars.reg_handle[bar],
1637 (uint64_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] + offset),
1644 u8_t bar,
1653 ddi_put32(pdev->vars.reg_handle[bar],
1654 (uint32_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] +