Lines Matching refs:pUM
76 static void BnxeFindDmaHandles(um_device_t * pUM)
82 BNXE_LOCK_ENTER_MEM(pUM);
86 LM_FOREACH_SB_ID(&pUM->lm_dev, idx)
88 if (CHIP_IS_E1x(&pUM->lm_dev))
91 pUM->lm_dev.vars.status_blocks_arr[idx].hc_status_block_data.e1x_sb_data.common.host_sb_addr.lo;
93 pUM->lm_dev.vars.status_blocks_arr[idx].hc_status_block_data.e1x_sb_data.common.host_sb_addr.hi;
98 pUM->lm_dev.vars.status_blocks_arr[idx].hc_status_block_data.e2_sb_data.common.host_sb_addr.lo;
100 pUM->lm_dev.vars.status_blocks_arr[idx].hc_status_block_data.e2_sb_data.common.host_sb_addr.hi;
103 pTmp = (BnxeMemDma *)d_list_peek_head(&pUM->memDmaList);
116 BnxeLogWarn(pUM, "Failed to find DMA handle for RSS status block %d", idx);
119 pUM->statusBlocks[idx] = pTmp;
124 pTmp = (BnxeMemDma *)d_list_peek_head(&pUM->memDmaList);
128 pUM->lm_dev.vars.gen_sp_status_block.blk_phy_address.as_ptr)
138 BnxeLogWarn(pUM, "Failed to find DMA handle for default status block");
141 pUM->statusBlocks[DEF_STATUS_BLOCK_IGU_INDEX] = pTmp;
143 BNXE_LOCK_EXIT_MEM(pUM);
147 void BnxeIntrIguSbEnable(um_device_t * pUM,
151 RxQueue * pRxQ = &pUM->rxq[idx];
152 u32_t igu_id = (FCOE_CID(&pUM->lm_dev) == idx) ?
153 LM_NON_RSS_SB(&pUM->lm_dev) : idx;
155 BNXE_LOCK_ENTER_INTR_FLIP(pUM, igu_id);
166 lm_int_ack_sb_enable(&pUM->lm_dev, igu_id);
176 BnxeDevName(pUM), igu_id);
182 lm_int_ack_sb_enable(&pUM->lm_dev, igu_id);
185 BNXE_LOCK_EXIT_INTR_FLIP(pUM, igu_id);
189 void BnxeIntrIguSbDisable(um_device_t * pUM,
193 RxQueue * pRxQ = &pUM->rxq[idx];
194 u32_t igu_id = (FCOE_CID(&pUM->lm_dev) == idx) ?
195 LM_NON_RSS_SB(&pUM->lm_dev) : idx;
197 BNXE_LOCK_ENTER_INTR_FLIP(pUM, igu_id);
203 lm_int_ack_sb_disable(&pUM->lm_dev, igu_id);
212 BnxeDevName(pUM), igu_id);
222 lm_int_ack_sb_disable(&pUM->lm_dev, igu_id);
228 BNXE_LOCK_EXIT_INTR_FLIP(pUM, igu_id);
232 static void BnxeServiceDefSbIntr(um_device_t * pUM,
236 lm_device_t * pLM = (lm_device_t *)pUM;
246 BnxeLogDbg(pUM, "Default INTR: Handling default status block %d", DEF_STATUS_BLOCK_INDEX);
248 ddi_dma_sync(pUM->statusBlocks[DEF_STATUS_BLOCK_IGU_INDEX]->dmaHandle,
251 if (pUM->fmCapabilities &&
252 BnxeCheckDmaHandle(pUM->statusBlocks[DEF_STATUS_BLOCK_IGU_INDEX]->dmaHandle) != DDI_FM_OK)
254 ddi_fm_service_impact(pUM->pDev, DDI_SERVICE_DEGRADED);
257 pUM->intrSbCnt[DEF_STATUS_BLOCK_IGU_INDEX]++;
261 BnxeLogDbg(pUM, "Default INTR: No change in default status index so bail!");
262 pUM->intrSbNoChangeCnt[DEF_STATUS_BLOCK_IGU_INDEX]++;
264 if (pUM->fmCapabilities &&
267 ddi_fm_service_impact(pUM->pDev, DDI_SERVICE_DEGRADED);
276 BnxeDbgBreakIfFastPath(pUM, !(activity_flg & LM_DEF_EVENT_MASK));
278 BnxeLogDbg(pUM, "Default INTR: processing events on sb: %x, events: 0x%x",
299 BnxeLogDbg(pUM, "Default INTR: asserted_proc_grps: 0x%x, deasserted_proc_grps:0x%x",
306 if (pUM->fmCapabilities &&
309 ddi_fm_service_impact(pUM->pDev, DDI_SERVICE_DEGRADED);
322 if (pUM->fmCapabilities &&
325 ddi_fm_service_impact(pUM->pDev, DDI_SERVICE_DEGRADED);
336 BnxeDbgBreakMsg(pUM, "Unknown iSCSI Rx completion!");
361 BnxeDbgBreakMsg(pUM, "Unknown iSCSI Tx completion!");
378 void BnxePollRxRing(um_device_t * pUM,
383 lm_device_t * pLM = (lm_device_t *)pUM;
390 BnxeLogDbg(pUM, "Ring Poll: Handling status block sb_id:%d drv_rss_id:%d",
394 ddi_dma_sync(pUM->statusBlocks[drv_rss_id]->dmaHandle,
397 if (pUM->fmCapabilities &&
398 BnxeCheckDmaHandle(pUM->statusBlocks[drv_rss_id]->dmaHandle) != DDI_FM_OK)
400 ddi_fm_service_impact(pUM->pDev, DDI_SERVICE_DEGRADED);
403 pUM->intrSbPollCnt[drv_rss_id]++;
407 BnxeLogDbg(pUM, "Ring Poll: No change in status index so bail!");
408 pUM->intrSbPollNoChangeCnt[drv_rss_id]++;
415 BnxeDbgBreakIf(pUM, !(activity_flg & LM_NON_DEF_EVENT_MASK));
417 BnxeLogDbg(pUM, "Ring Poll: processing events on sb: %x, events: 0x%x",
451 void BnxePollRxRingFCOE(um_device_t * pUM)
453 lm_device_t * pLM = (lm_device_t *)pUM;
459 BnxeLogDbg(pUM, "Ring Poll FCoE: Handling status block sb_id:%d drv_rss_id:%d",
463 ddi_dma_sync(pUM->statusBlocks[sb_id]->dmaHandle,
466 if (pUM->fmCapabilities &&
467 BnxeCheckDmaHandle(pUM->statusBlocks[sb_id]->dmaHandle) != DDI_FM_OK)
469 ddi_fm_service_impact(pUM->pDev, DDI_SERVICE_DEGRADED);
472 pUM->intrSbPollCnt[sb_id]++;
476 BnxeLogDbg(pUM, "Ring Poll FCoE: No change in status index so bail!");
477 pUM->intrSbPollNoChangeCnt[sb_id]++;
484 BnxeDbgBreakIf(pUM, !(activity_flg & LM_NON_DEF_EVENT_MASK));
486 BnxeLogDbg(pUM, "Ring Poll FCoE: processing events on sb: %x, events: 0x%x",
499 static void BnxeServiceSbIntr(um_device_t * pUM,
504 lm_device_t * pLM = (lm_device_t *)pUM;
513 BnxeLogDbg(pUM, "Ring INTR: Handling status block sb_id:%d drv_rss_id:%d",
517 ddi_dma_sync(pUM->statusBlocks[sb_id]->dmaHandle,
520 if (pUM->fmCapabilities &&
521 BnxeCheckDmaHandle(pUM->statusBlocks[sb_id]->dmaHandle) != DDI_FM_OK)
523 ddi_fm_service_impact(pUM->pDev, DDI_SERVICE_DEGRADED);
526 pUM->intrSbCnt[sb_id]++;
530 BnxeLogDbg(pUM, "Ring INTR: No change in status index so bail!");
531 pUM->intrSbNoChangeCnt[sb_id]++;
541 BnxeDbgBreakIf(pUM, !(activity_flg & LM_NON_DEF_EVENT_MASK));
543 BnxeLogDbg(pUM, "Ring INTR: processing events on sb: %x, events: 0x%x",
575 BnxeDbgBreakMsg(pUM, "Unknown TOE Tx completion!");
581 BnxeDbgBreakMsg(pUM, "Unknown iSCSI EQ completion!");
590 um_device_t * pUM = (um_device_t *)arg1;
591 lm_device_t * pLM = &pUM->lm_dev;
598 BNXE_LOCK_ENTER_INTR(pUM, idx);
600 if (!pUM->intrEnabled)
604 BNXE_LOCK_EXIT_INTR(pUM, idx);
608 BnxeLogDbg(pUM, "-> BNXE INTA Interrupt <-");
614 if (pUM->fmCapabilities &&
617 ddi_fm_service_impact(pUM->pDev, DDI_SERVICE_DEGRADED);
624 BNXE_LOCK_EXIT_INTR(pUM, idx);
631 BnxeLogDbg(pUM, "INTA INTR: we got an interrupt when disabled");
633 BNXE_LOCK_EXIT_INTR(pUM, idx);
637 atomic_add_64((volatile uint64_t *)&pUM->intrFired, 1);
647 BnxeServiceDefSbIntr(pUM, &pktsRxed, &pktsTxed);
655 if (pktsTxed) BnxeTxRingProcess(pUM, FCOE_CID(pLM));
656 if (pktsRxed) BnxeRxRingProcess(pUM, FCOE_CID(pLM), B_FALSE, 0);
671 BnxeServiceSbIntr(pUM, (rss_id - 1), &pktsRxed, &pktsTxed);
673 if (pktsTxed) BnxeTxRingProcess(pUM, (rss_id - 1));
674 if (pktsRxed) BnxeRxRingProcess(pUM, (rss_id - 1), B_FALSE, 0);
686 BNXE_LOCK_EXIT_INTR(pUM, idx);
694 um_device_t * pUM = (um_device_t *)arg1;
695 lm_device_t * pLM = &pUM->lm_dev;
701 BNXE_LOCK_ENTER_INTR(pUM, sb_id);
703 if (!pUM->intrEnabled)
707 BNXE_LOCK_EXIT_INTR(pUM, sb_id);
711 BnxeLogDbg(pUM, "-> BNXE MSIX Interrupt SB %d <-", sb_id);
716 BnxeLogDbg(pUM, "MISR INTR: we got an interrupt when disabled");
718 BNXE_LOCK_EXIT_INTR(pUM, sb_id);
722 atomic_add_64((volatile uint64_t *)&pUM->intrFired, 1);
728 BnxeServiceDefSbIntr(pUM, &pktsRxed, &pktsTxed);
736 if (pktsTxed) BnxeTxRingProcess(pUM, FCOE_CID(pLM));
737 if (pktsRxed) BnxeRxRingProcess(pUM, FCOE_CID(pLM), FALSE, 0);
754 CLIENT_BOUND(pUM, LM_CLI_IDX_FCOE) &&
755 (pUM->rssIntr.intrCount == LM_MAX_RSS_CHAINS(&pUM->lm_dev))) ?
758 if (pUM->rxq[idx].inPollMode)
763 BnxeDevName(pUM), idx);
767 BnxeIntrIguSbDisable(pUM, idx, B_TRUE);
769 BnxeServiceSbIntr(pUM, sb_id, &pktsRxed, &pktsTxed);
771 if (pktsTxed) BnxeTxRingProcess(pUM, sb_id);
772 if (pktsRxed) BnxeRxRingProcess(pUM, sb_id, B_FALSE, 0);
777 BnxeIntrIguSbEnable(pUM, idx, B_TRUE);
780 BNXE_LOCK_EXIT_INTR(pUM, sb_id);
800 static boolean_t BnxeIntrBlockAlloc(um_device_t * pUM,
806 dev_info_t * pDev = pUM->pDev;
811 if ((pUM->intrType == DDI_INTR_TYPE_FIXED) && (intrCnt != 1))
834 BnxeLogWarn(pUM, "Memory alloc failed for isr handle block (inum=%d)!",
841 pUM->intrType,
847 BnxeLogWarn(pUM, "Failed to allocate isr handle block (%d) (inum=%d cnt=%d)!",
888 BnxeLogWarn(pUM, "Failed to allocate desired isr count (%d/%d)!",
913 BnxeLogWarn(pUM, "Failed to get isr capability (%d)!", rc);
920 BnxeLogWarn(pUM, "Failed to get isr priority (%d)!", rc);
926 BnxeLogWarn(pUM, "Interrupt priority is too high!");
947 static void BnxeIntrBlockFree(um_device_t * pUM,
970 static boolean_t BnxeIntrAddHandlers(um_device_t * pUM)
974 switch (pUM->intrType)
979 pUM->defIntr.pIntrHandleBlock[0],
981 (caddr_t)pUM,
985 BnxeLogWarn(pUM, "Failed to add the MSIX default isr handler (%d)", rc);
989 for (i = 0; i < pUM->rssIntr.intrCount; i++)
992 pUM->rssIntr.pIntrHandleBlock[i],
994 (caddr_t)pUM,
998 BnxeLogWarn(pUM, "Failed to add the MSIX RSS isr handler %d (%d)",
999 (i + NDIS_CID(&pUM->lm_dev)), rc);
1001 ddi_intr_remove_handler(pUM->defIntr.pIntrHandleBlock[0]);
1005 ddi_intr_remove_handler(pUM->rssIntr.pIntrHandleBlock[j]);
1017 if (pUM->fcoeIntr.intrCount == 1)
1020 pUM->fcoeIntr.pIntrHandleBlock[0],
1022 (caddr_t)pUM,
1023 (caddr_t)(uintptr_t)LM_NON_RSS_SB(&pUM->lm_dev))) !=
1026 BnxeLogWarn(pUM, "Failed to add the MSIX FCoE isr handler (%d)", rc);
1028 ddi_intr_remove_handler(pUM->defIntr.pIntrHandleBlock[0]);
1030 for (i = 0; i < pUM->rssIntr.intrCount; i++)
1032 ddi_intr_remove_handler(pUM->rssIntr.pIntrHandleBlock[i]);
1044 pUM->defIntr.pIntrHandleBlock[0],
1046 (caddr_t)pUM,
1050 BnxeLogWarn(pUM, "Failed to add the fixed default isr handler (%d)", rc);
1058 BnxeLogWarn(pUM, "Failed to add isr handler (unsupported type %d)!",
1059 pUM->intrType);
1067 static void BnxeIntrBlockRemoveHandler(um_device_t * pUM,
1072 (void)pUM;
1086 static boolean_t BnxeIntrBlockEnable(um_device_t * pUM,
1101 BnxeLogWarn(pUM, "Failed to enable isr block (%d)", rc);
1112 BnxeLogWarn(pUM, "Failed to enable isr %d (%d)", i, rc);
1128 static void BnxeIntrBlockDisable(um_device_t * pUM,
1152 int BnxeIntrEnable(um_device_t * pUM)
1157 atomic_swap_64((volatile uint64_t *)&pUM->intrFired, 0);
1161 pUM->intrSbCnt[i] = 0;
1162 pUM->intrSbNoChangeCnt[i] = 0;
1166 BnxeFindDmaHandles(pUM);
1170 if (!BnxeIntrBlockEnable(pUM, &pUM->defIntr))
1172 BnxeLogWarn(pUM, "Failed to enable the default interrupt");
1178 if (!BnxeIntrBlockEnable(pUM, &pUM->fcoeIntr))
1180 BnxeLogWarn(pUM, "Failed to enable the FCoE interrupt");
1181 BnxeIntrBlockDisable(pUM, &pUM->defIntr);
1187 if (!BnxeIntrBlockEnable(pUM, &pUM->rssIntr))
1189 BnxeLogWarn(pUM, "Failed to enable the RSS interrupt");
1190 BnxeIntrBlockDisable(pUM, &pUM->defIntr);
1191 BnxeIntrBlockDisable(pUM, &pUM->fcoeIntr);
1196 atomic_swap_32(&pUM->intrEnabled, B_TRUE);
1197 lm_enable_int(&pUM->lm_dev);
1199 if (pUM->fmCapabilities &&
1200 BnxeCheckAccHandle(pUM->lm_dev.vars.reg_handle[BAR_0]) != DDI_FM_OK)
1202 ddi_fm_service_impact(pUM->pDev, DDI_SERVICE_DEGRADED);
1212 void BnxeIntrDisable(um_device_t * pUM)
1217 lm_disable_int(&pUM->lm_dev);
1219 if (pUM->fmCapabilities &&
1220 BnxeCheckAccHandle(pUM->lm_dev.vars.reg_handle[BAR_0]) != DDI_FM_OK)
1222 ddi_fm_service_impact(pUM->pDev, DDI_SERVICE_DEGRADED);
1225 atomic_swap_32(&pUM->intrEnabled, B_FALSE);
1235 BNXE_LOCK_ENTER_INTR(pUM, i);
1236 BNXE_LOCK_EXIT_INTR(pUM, i);
1241 BnxeIntrBlockDisable(pUM, &pUM->defIntr);
1245 BnxeIntrBlockDisable(pUM, &pUM->fcoeIntr);
1249 BnxeIntrBlockDisable(pUM, &pUM->rssIntr);
1253 boolean_t BnxeIntrInit(um_device_t * pUM)
1261 pDev = pUM->pDev;
1263 atomic_swap_32(&pUM->intrEnabled, B_FALSE);
1267 BnxeLogWarn(pUM, "Failed to get supported interrupt types (%d)", rc);
1277 BnxeLogWarn(pUM, "Fixed interrupt not supported!");
1281 memset(&pUM->defIntr, 0, sizeof(BnxeIntrBlock));
1282 memset(&pUM->rssIntr, 0, sizeof(BnxeIntrBlock));
1283 memset(&pUM->fcoeIntr, 0, sizeof(BnxeIntrBlock));
1285 if (pUM->devParams.disableMsix)
1287 BnxeLogInfo(pUM, "Forcing fixed level interrupts.");
1288 pUM->lm_dev.params.interrupt_mode = LM_INT_MODE_INTA;
1289 pUM->intrType = DDI_INTR_TYPE_FIXED;
1293 pUM->lm_dev.params.interrupt_mode = LM_INT_MODE_MIMD;
1294 pUM->intrType = DDI_INTR_TYPE_MSIX;
1298 pUM->lm_dev.params.interrupt_mode = LM_INT_MODE_INTA;
1299 pUM->intrType = DDI_INTR_TYPE_FIXED;
1306 if (!BnxeIntrBlockAlloc(pUM,
1309 &pUM->defIntr))
1311 BnxeLogWarn(pUM, "Failed to allocate default %s interrupt!",
1312 BnxeIntrTypeName(pUM->intrType));
1318 if (pUM->intrType == DDI_INTR_TYPE_FIXED)
1324 if (BnxeProtoFcoeAfex(pUM))
1326 pUM->devParams.numRings = 0;
1332 while (pUM->devParams.numRings > 0)
1334 if (!BnxeIntrBlockAlloc(pUM,
1335 (NDIS_CID(&pUM->lm_dev) + 1),
1336 pUM->devParams.numRings,
1337 &pUM->rssIntr))
1339 BnxeLogWarn(pUM, "Failed to allocate %d RSS %s interrupts!",
1340 pUM->devParams.numRings,
1341 BnxeIntrTypeName(pUM->intrType));
1342 pUM->devParams.numRings >>= 1;
1349 if (pUM->devParams.numRings == 0)
1351 BnxeIntrBlockFree(pUM, &pUM->defIntr);
1355 BnxeLogInfo(pUM, "Allocated %d RSS %s interrupts.",
1356 pUM->rssIntr.intrCount,
1357 BnxeIntrTypeName(pUM->intrType));
1359 intrTotalAlloc += pUM->rssIntr.intrCount; /* intrCount <= numRings */
1368 if (BNXE_FCOE(pUM))
1370 if (pUM->rssIntr.intrCount < LM_MAX_RSS_CHAINS(&pUM->lm_dev))
1372 if (!BnxeIntrBlockAlloc(pUM,
1373 (LM_NON_RSS_SB(&pUM->lm_dev) + 1),
1375 &pUM->fcoeIntr))
1377 BnxeLogWarn(pUM, "Failed to allocate FCoE %s interrupt!",
1378 BnxeIntrTypeName(pUM->intrType));
1379 BnxeIntrBlockFree(pUM, &pUM->defIntr);
1380 BnxeIntrBlockFree(pUM, &pUM->rssIntr);
1389 memset(&pUM->fcoeIntr, 0, sizeof(BnxeIntrBlock));
1397 if (pUM->intrType == DDI_INTR_TYPE_FIXED)
1404 pUM->lm_dev.params.interrupt_mode = LM_INT_MODE_INTA;
1405 pUM->intrType = DDI_INTR_TYPE_FIXED;
1408 if (pUM->intrType == DDI_INTR_TYPE_MSIX)
1410 pUM->devParams.numRings = pUM->rssIntr.intrCount;
1411 pUM->lm_dev.params.rss_chain_cnt = pUM->rssIntr.intrCount;
1412 pUM->lm_dev.params.tss_chain_cnt = pUM->rssIntr.intrCount;
1417 pUM->devParams.numRings = 0;
1418 pUM->lm_dev.params.rss_chain_cnt = 1;
1419 pUM->lm_dev.params.tss_chain_cnt = 1;
1421 BnxeLogWarn(pUM, "Using Fixed Level Interrupts! (set ddi_msix_alloc_limit in /etc/system)");
1424 BnxeLogInfo(pUM, "Interrupts (Supported - %d Fixed / %d MSI / %d MSIX) (Allocated - %d %s)",
1425 numFIX, numMSI, numMSIX, intrTotalAlloc, BnxeIntrTypeName(pUM->intrType));
1427 if (!BnxeIntrAddHandlers(pUM))
1429 BnxeLogWarn(pUM, "Failed to add interrupts!");
1430 BnxeIntrBlockFree(pUM, &pUM->defIntr);
1431 BnxeIntrBlockFree(pUM, &pUM->fcoeIntr);
1432 BnxeIntrBlockFree(pUM, &pUM->rssIntr);
1437 pUM->intrPriority = pUM->defIntr.intrPriority;
1443 void BnxeIntrFini(um_device_t * pUM)
1447 BnxeIntrBlockDisable(pUM, &pUM->defIntr);
1448 BnxeIntrBlockRemoveHandler(pUM, &pUM->defIntr);
1449 BnxeIntrBlockFree(pUM, &pUM->defIntr);
1451 BnxeIntrBlockDisable(pUM, &pUM->fcoeIntr);
1452 BnxeIntrBlockRemoveHandler(pUM, &pUM->fcoeIntr);
1453 BnxeIntrBlockFree(pUM, &pUM->fcoeIntr);
1455 BnxeIntrBlockDisable(pUM, &pUM->rssIntr);
1456 BnxeIntrBlockRemoveHandler(pUM, &pUM->rssIntr);
1457 BnxeIntrBlockFree(pUM, &pUM->rssIntr);