Lines Matching refs:pUM
114 um_device_t * pUM = (um_device_t *)pArg;
119 if ((pUM == NULL) || (pVal == NULL))
124 pLM = &pUM->lm_dev;
126 BNXE_LOCK_ENTER_GLD(pUM);
128 if (!pUM->plumbed)
130 BNXE_LOCK_EXIT_GLD(pUM);
139 *pVal = (pUM->props.link_speed * 1000000ULL);
174 *pVal += pUM->txq[idx].txRecycle;
296 switch (pUM->props.link_speed)
377 *pVal = pUM->curcfg.lnkcfg.param_10000fdx;
382 *pVal = pUM->curcfg.lnkcfg.param_1000fdx;
387 //*pVal = pUM->curcfg.lnkcfg.param_1000hdx;
393 *pVal = pUM->curcfg.lnkcfg.param_100fdx;
397 *pVal = pUM->curcfg.lnkcfg.param_100hdx;
401 *pVal = pUM->curcfg.lnkcfg.param_10fdx;
405 *pVal = pUM->curcfg.lnkcfg.param_10hdx;
417 *pVal = pUM->curcfg.lnkcfg.link_autoneg;
429 *pVal = pUM->remote.param_10000fdx;
434 *pVal = pUM->remote.param_1000fdx;
439 //*pVal = pUM->remote.param_1000hdx;
445 *pVal = pUM->remote.param_100fdx;
449 *pVal = pUM->remote.param_100hdx;
453 *pVal = pUM->remote.param_10fdx;
457 *pVal = pUM->remote.param_10hdx;
471 *pVal = pUM->remote.link_autoneg;
490 *pVal = pUM->curcfg.lnkcfg.link_autoneg;
494 *pVal = (pUM->props.link_duplex == B_TRUE) ?
502 BNXE_LOCK_EXIT_GLD(pUM);
515 um_device_t * pUM = (um_device_t *)pArg;
517 BNXE_LOCK_ENTER_GLD(pUM);
519 if (pUM->plumbed)
522 BNXE_LOCK_EXIT_GLD(pUM);
527 mac_link_update(pUM->pMac, LINK_STATE_UNKNOWN);
529 if (BnxeHwStartL2(pUM))
531 BNXE_LOCK_EXIT_GLD(pUM);
535 atomic_swap_32(&pUM->plumbed, B_TRUE);
541 BNXE_LOCK_EXIT_GLD(pUM);
553 um_device_t * pUM = (um_device_t *)pArg;
555 BNXE_LOCK_ENTER_GLD(pUM);
557 if (pUM->plumbed)
559 atomic_swap_32(&pUM->plumbed, B_FALSE);
561 BnxeHwStopL2(pUM);
564 mac_link_update(pUM->pMac, LINK_STATE_UNKNOWN);
571 BNXE_LOCK_EXIT_GLD(pUM);
578 um_device_t * pUM = (um_device_t *)pArg;
580 BNXE_LOCK_ENTER_GLD(pUM);
582 if (!pUM->plumbed)
584 BNXE_LOCK_EXIT_GLD(pUM);
590 pUM->devParams.rx_filter_mask[LM_CLI_IDX_NDIS] |=
595 pUM->devParams.rx_filter_mask[LM_CLI_IDX_NDIS] &=
599 BNXE_LOCK_ENTER_HWINIT(pUM);
601 if (BnxeRxMask(pUM, LM_CLI_IDX_NDIS,
602 pUM->devParams.rx_filter_mask[LM_CLI_IDX_NDIS]) < 0)
604 BNXE_LOCK_EXIT_HWINIT(pUM);
605 BNXE_LOCK_EXIT_GLD(pUM);
609 BNXE_LOCK_EXIT_HWINIT(pUM);
611 BNXE_LOCK_EXIT_GLD(pUM);
626 um_device_t * pUM = (um_device_t *)pArg;
629 BNXE_LOCK_ENTER_GLD(pUM);
631 if (!pUM->plumbed)
633 BNXE_LOCK_EXIT_GLD(pUM);
637 BNXE_LOCK_ENTER_HWINIT(pUM);
638 rc = BnxeMulticast(pUM, LM_CLI_IDX_NDIS, flag, pMcastAddr, B_TRUE);
639 BNXE_LOCK_EXIT_HWINIT(pUM);
641 BNXE_LOCK_EXIT_GLD(pUM);
659 um_device_t * pUM = (um_device_t *)pRxQGroup->pUM;
667 BNXE_LOCK_ENTER_GLD(pUM);
669 if (!pUM->plumbed)
671 BNXE_LOCK_EXIT_GLD(pUM);
678 BnxeLogWarn(pUM, "Cannot program a mcast/bcast address as a MAC Address.");
679 BNXE_LOCK_EXIT_GLD(pUM);
683 if (pUM->ucastTableLen == LM_MAX_UC_TABLE_SIZE)
685 BNXE_LOCK_EXIT_GLD(pUM);
689 BNXE_LOCK_ENTER_HWINIT(pUM);
691 COPY_ETH_ADDRESS(pMacAddr, pUM->lm_dev.params.mac_addr);
693 rc = BnxeMacAddress(pUM, LM_CLI_IDX_NDIS, B_TRUE,
694 pUM->lm_dev.params.mac_addr);
696 BNXE_LOCK_EXIT_HWINIT(pUM);
700 BNXE_LOCK_EXIT_GLD(pUM);
704 pUM->ucastTableLen++;
706 BNXE_LOCK_EXIT_GLD(pUM);
715 um_device_t * pUM = (um_device_t *)pRxQGroup->pUM;
719 BNXE_LOCK_ENTER_GLD(pUM);
721 if (!pUM->plumbed)
723 BNXE_LOCK_EXIT_GLD(pUM);
727 if (pUM->ucastTableLen == 0)
729 BNXE_LOCK_EXIT_GLD(pUM);
733 BNXE_LOCK_ENTER_HWINIT(pUM);
735 if (!IS_ETH_ADDRESS_EQUAL(pMacAddr, pUM->lm_dev.params.mac_addr))
737 BnxeLogWarn(pUM, "Deleting MAC address that doesn't match default");
741 rc = BnxeMacAddress(pUM, LM_CLI_IDX_NDIS, B_FALSE,
742 pUM->lm_dev.params.mac_addr);
744 memset(pUM->lm_dev.params.mac_addr, 0, sizeof(pUM->lm_dev.params.mac_addr));
746 BNXE_LOCK_EXIT_HWINIT(pUM);
750 BNXE_LOCK_EXIT_GLD(pUM);
754 pUM->ucastTableLen--;
756 BNXE_LOCK_EXIT_GLD(pUM);
765 um_device_t * pUM = (um_device_t *)pTxQ->pUM;
775 rc = BnxeTxSendMblk(pUM, idx, pMblk, 0, 0);
803 um_device_t * pUM = (um_device_t *)pArg;
806 BNXE_LOCK_ENTER_GLD(pUM);
808 if (!pUM->plumbed)
810 memcpy(pUM->gldMac, pMacAddr, ETHERNET_ADDRESS_SIZE);
811 BNXE_LOCK_EXIT_GLD(pUM);
818 BnxeLogWarn(pUM, "Cannot program a mcast/bcast address as a MAC Address.");
819 BNXE_LOCK_EXIT_GLD(pUM);
823 BNXE_LOCK_ENTER_HWINIT(pUM);
825 COPY_ETH_ADDRESS(pMacAddr, pUM->lm_dev.params.mac_addr);
827 rc = BnxeMacAddress(pUM, LM_CLI_IDX_NDIS, B_TRUE,
828 pUM->lm_dev.params.mac_addr);
830 BNXE_LOCK_EXIT_HWINIT(pUM);
834 BNXE_LOCK_EXIT_GLD(pUM);
838 BNXE_LOCK_EXIT_GLD(pUM);
846 um_device_t * pUM = (um_device_t *)pArg;
850 BNXE_LOCK_ENTER_GLDTX(pUM, RW_READER);
852 if (!pUM->plumbed)
855 BNXE_LOCK_EXIT_GLDTX(pUM);
862 ring = BnxeRouteTxRing(pUM, pMblk);
867 //rc = BnxeTxSendMblk(pUM, NDIS_CID(&pUM->lm_dev), pMblk, 0, 0);
868 rc = BnxeTxSendMblk(pUM, ring, pMblk, 0, 0);
887 BNXE_LOCK_EXIT_GLDTX(pUM);
899 um_device_t * pUM = (um_device_t *)pArg;
901 if (!pUM->plumbed)
915 um_device_t * pUM = (um_device_t *)pArg;
921 mrf.mrf_arg = (void *)pUM;
925 LM_FOREACH_RSS_IDX(&pUM->lm_dev, idx)
927 pUM->macRxResourceHandles[idx] =
928 mac_resource_add(pUM->pMac, (mac_resource_t *)&mrf);
935 static boolean_t BnxeReadReg(um_device_t * pUM,
940 BnxeLogWarn(pUM, "Invalid register offset for GIOCBNXEREG ioctl");
944 LM_BAR_RD32_OFFSET(&pUM->lm_dev, 0, pData->offset, &pData->value);
950 static boolean_t BnxeWriteReg(um_device_t * pUM,
955 BnxeLogWarn(pUM, "Invalid register offset for SIOCBNXEREG ioctl");
959 LM_BAR_WR32_OFFSET(&pUM->lm_dev, 0, pData->offset, pData->value);
965 static boolean_t BnxeReadNvm(um_device_t * pUM,
970 BnxeLogWarn(pUM, "Invalid register offset for GIOCBNXENVRM ioctl");
974 if (lm_nvram_read(&pUM->lm_dev,
987 static boolean_t BnxeWriteNvm(um_device_t * pUM,
992 BnxeLogWarn(pUM, "Invalid register offset for SIOCBNXENVRM ioctl");
996 if (lm_nvram_write(&pUM->lm_dev,
1009 static boolean_t BnxeReadPciCfg(um_device_t * pUM,
1012 pData->value = pci_config_get32(pUM->pPciCfg, (off_t)pData->offset);
1046 static boolean_t BnxeStatsShow(um_device_t * pUM,
1241 lm_stats_get_l2_chip_stats(&pUM->lm_dev,
1245 lm_stats_get_l4_chip_stats(&pUM->lm_dev,
1248 lm_stats_get_l2_driver_stats(&pUM->lm_dev
1251 lm_stats_get_l4_driver_stats(&pUM->lm_dev,
1266 um_device_t * pUM = (um_device_t *)pArg;
1283 BNXE_LOCK_ENTER_GLD(pUM);
1304 if (lm_dcbx_lldp_read_params(&pUM->lm_dev,
1309 (!IS_DCB_ENABLED(&pUM->lm_dev)) ? ENOTSUP : EINVAL);
1333 if (lm_dcbx_read_params(&pUM->lm_dev,
1338 (!IS_DCB_ENABLED(&pUM->lm_dev)) ? ENOTSUP : EINVAL);
1361 if (!BnxeReadReg(pUM, (struct bnxe_reg_data *)pMblk->b_cont->b_rptr))
1382 if (!BnxeWriteReg(pUM, (struct bnxe_reg_data *)pMblk->b_cont->b_rptr))
1403 if (!BnxeReadNvm(pUM, (struct bnxe_nvram_data *)pMblk->b_cont->b_rptr))
1424 if (!BnxeWriteNvm(pUM, (struct bnxe_nvram_data *)pMblk->b_cont->b_rptr))
1445 if (!BnxeReadPciCfg(pUM, (struct bnxe_reg_data *)pMblk->b_cont->b_rptr))
1467 if (!BnxeStatsShow(pUM,
1486 BNXE_LOCK_EXIT_GLD(pUM);
1502 um_device_t * pUM = (um_device_t *)pRxQ->pUM;
1519 BnxeLogWarn(pUM, "Polling on ring %d when NOT in poll mode!", idx);
1523 BNXE_LOCK_ENTER_INTR(pUM, idx);
1527 BnxePollRxRing(pUM, idx, &pktsRxed, &pktsTxed);
1529 if (pktsTxed) BnxeTxRingProcess(pUM, idx);
1530 if (pktsRxed) pMblk = BnxeRxRingProcess(pUM, idx, TRUE, numBytes);
1537 lm_sq_post_pending(&pUM->lm_dev);
1539 BNXE_LOCK_EXIT_INTR(pUM, idx);
1552 um_device_t * pUM = (um_device_t *)pRxQ->pUM;
1555 BnxeLogDbg(pUM, "Starting Rx Ring %d", idx);
1557 BNXE_LOCK_ENTER_RX(pUM, idx);
1565 BNXE_LOCK_EXIT_RX(pUM, idx);
1578 um_device_t * pUM = (um_device_t *)pRxQ->pUM;
1605 um_device_t * pUM = (um_device_t *)pRxQ->pUM;
1607 BnxeLogDbg(pUM, "Enabling Interrupt for Rx Ring %d", pRxQ->idx);
1610 if ((pRxQ->idx == LM_NON_RSS_SB(&pUM->lm_dev)) &&
1611 CLIENT_BOUND(pUM, LM_CLI_IDX_FCOE) &&
1612 (pUM->rssIntr.intrCount == LM_MAX_RSS_CHAINS(&pUM->lm_dev)))
1617 BnxeIntrIguSbEnable(pUM, pRxQ->idx, B_FALSE);
1630 um_device_t * pUM = (um_device_t *)pRxQ->pUM;
1632 BnxeLogDbg(pUM, "Disabling Interrupt for Rx Ring %d", pRxQ->idx);
1635 if ((pRxQ->idx == LM_NON_RSS_SB(&pUM->lm_dev)) &&
1636 CLIENT_BOUND(pUM, LM_CLI_IDX_FCOE) &&
1637 (pUM->rssIntr.intrCount == LM_MAX_RSS_CHAINS(&pUM->lm_dev)))
1642 BnxeIntrIguSbDisable(pUM, pRxQ->idx, B_FALSE);
1656 um_device_t * pUM = (um_device_t *)arg;
1664 BnxeLogInfo(pUM, "Initializing Rx Ring %d (Ring Group %d)",
1668 ASSERT(ringIndex < pUM->devParams.numRings);
1670 pRxQ = &pUM->rxq[ringIndex];
1691 BnxeLogInfo(pUM, "Initializing Tx Ring %d (Ring Group %d)",
1695 ASSERT(ringIndex < pUM->devParams.numRings);
1697 pTxQ = &pUM->txq[ringIndex];
1723 um_device_t * pUM = (um_device_t *)arg;
1730 BnxeLogInfo(pUM, "Initializing Rx Group %d", ringGroupIndex);
1732 pRxQGroup = &pUM->rxqGroup[ringGroupIndex];
1740 pGroupInfo->mgi_count = (pUM->devParams.numRings /
1761 um_device_t * pUM = (um_device_t *)pArg;
1771 if (pUM->devParams.enabled_oflds &
1777 if (pUM->devParams.enabled_oflds &
1790 if (pUM->devParams.lsoEnable)
1803 if (!pUM->devParams.numRings)
1815 pCapRings->mr_rnum = pUM->devParams.numRings;
1873 static int BnxeSetPrivateProperty(um_device_t * pUM,
1893 pUM->hwinit.lnkcfg.param_2500fdx = (uint32_t)result;
1894 pUM->curcfg.lnkcfg.param_2500fdx = (uint32_t)result;
1895 if (pUM->plumbed) BnxeUpdatePhy(pUM);
1909 pUM->hwinit.lnkcfg.param_txpause = (uint32_t)result;
1910 pUM->curcfg.lnkcfg.param_txpause = (uint32_t)result;
1911 if (pUM->plumbed) BnxeUpdatePhy(pUM);
1925 pUM->hwinit.lnkcfg.param_rxpause = (uint32_t)result;
1926 pUM->curcfg.lnkcfg.param_rxpause = (uint32_t)result;
1927 if (pUM->plumbed) BnxeUpdatePhy(pUM);
1941 pUM->hwinit.flow_autoneg = (uint32_t)result;
1942 pUM->curcfg.flow_autoneg = (uint32_t)result;
1943 if (pUM->plumbed) BnxeUpdatePhy(pUM);
1947 if (pUM->plumbed)
1961 pUM->devParams.enabled_oflds = LM_OFFLOAD_NONE;
1966 pUM->devParams.enabled_oflds = (LM_OFFLOAD_TX_IP_CKSUM |
1972 pUM->devParams.enabled_oflds = (LM_OFFLOAD_TX_IP_CKSUM |
1985 pUM->devParams.checksum = (uint32_t)result;
2008 pUM->devParams.routeTxRingPolicy = (uint32_t)result;
2012 if (pUM->plumbed)
2028 pUM->devParams.numRings = (uint32_t)result;
2032 if (pUM->plumbed)
2047 pUM->devParams.numRxDesc[LM_CLI_IDX_NDIS] = (uint32_t)result;
2061 pUM->devParams.maxRxFree = (uint32_t)result;
2065 if (pUM->plumbed)
2080 pUM->devParams.numTxDesc[LM_CLI_IDX_NDIS] = (uint32_t)result;
2094 pUM->devParams.maxTxFree = (uint32_t)result;
2103 pUM->devParams.rxCopyThreshold = (uint32_t)result;
2112 pUM->devParams.txCopyThreshold = (uint32_t)result;
2116 if (pUM->plumbed)
2131 pUM->devParams.intrCoalesce = (uint32_t)result;
2135 if (pUM->plumbed)
2151 pUM->devParams.intrRxPerSec = (uint32_t)(1000000 / result);
2155 if (pUM->plumbed)
2171 pUM->devParams.intrTxPerSec = (uint32_t)(1000000 / result);
2175 if (pUM->plumbed)
2190 pUM->devParams.disableMsix = (uint32_t)result;
2194 if (pUM->plumbed)
2209 pUM->devParams.l2_fw_flow_ctrl = (uint32_t)result;
2223 pUM->devParams.autogreeenEnable = (uint32_t)result;
2224 if (pUM->plumbed) BnxeUpdatePhy(pUM);
2228 if (pUM->plumbed)
2243 pUM->devParams.lsoEnable = (uint32_t)result;
2257 pUM->devParams.logEnable = (uint32_t)result;
2271 pUM->devParams.fcoeEnable = (uint32_t)result;
2273 if (BNXE_FCOE(pUM))
2275 BnxeFcoeStartStop(pUM);
2293 um_device_t * pUM = barg;
2301 BNXE_LOCK_ENTER_GLD(pUM);
2329 pUM->hwinit.lnkcfg.param_10000fdx = *(uint8_t *)pr_val;
2330 pUM->curcfg.lnkcfg.param_10000fdx = *(uint8_t *)pr_val;
2336 pUM->hwinit.lnkcfg.param_1000fdx = *(uint8_t *)pr_val;
2337 pUM->curcfg.lnkcfg.param_1000fdx = *(uint8_t *)pr_val;
2343 pUM->hwinit.lnkcfg.param_100fdx = *(uint8_t *)pr_val;
2344 pUM->curcfg.lnkcfg.param_100fdx = *(uint8_t *)pr_val;
2350 pUM->hwinit.lnkcfg.param_100hdx = *(uint8_t *)pr_val;
2351 pUM->curcfg.lnkcfg.param_100hdx = *(uint8_t *)pr_val;
2357 pUM->hwinit.lnkcfg.param_10fdx = *(uint8_t *)pr_val;
2358 pUM->curcfg.lnkcfg.param_10fdx = *(uint8_t *)pr_val;
2364 pUM->hwinit.lnkcfg.param_10hdx = *(uint8_t *)pr_val;
2365 pUM->curcfg.lnkcfg.param_10hdx = *(uint8_t *)pr_val;
2371 pUM->hwinit.lnkcfg.link_autoneg = *(uint8_t *)pr_val;
2372 pUM->curcfg.lnkcfg.link_autoneg = *(uint8_t *)pr_val;
2414 pUM->hwinit.lnkcfg.param_rxpause = rxpause;
2415 pUM->hwinit.lnkcfg.param_txpause = txpause;
2416 pUM->curcfg.lnkcfg.param_rxpause = rxpause;
2417 pUM->curcfg.lnkcfg.param_txpause = txpause;
2425 if (pUM->plumbed)
2439 if (pUM->devParams.mtu[LM_CLI_IDX_NDIS] == mtu)
2444 pUM->devParams.mtu[LM_CLI_IDX_NDIS] = mtu;
2445 err = mac_maxsdu_update(pUM->pMac, pUM->devParams.mtu[LM_CLI_IDX_NDIS]);
2446 pUM->lm_dev.params.mtu[LM_CLI_IDX_NDIS] = pUM->devParams.mtu[LM_CLI_IDX_NDIS];
2451 err = BnxeSetPrivateProperty(pUM, pr_name, pr_valsize, pr_val);
2457 if (pUM->plumbed) BnxeUpdatePhy(pUM);
2460 BNXE_LOCK_EXIT_GLD(pUM);
2469 static int BnxeGetPrivateProperty(um_device_t * pUM,
2474 BnxeLinkCfg * lnk_cfg = &pUM->curcfg.lnkcfg;
2475 BnxeLinkCfg * hw_cfg = &pUM->hwinit.lnkcfg;
2497 value = pUM->props.link_txpause;
2509 value = pUM->props.link_rxpause;
2513 value = pUM->hwinit.flow_autoneg;
2517 value = pUM->devParams.checksum;
2521 value = pUM->devParams.routeTxRingPolicy;
2525 value = pUM->devParams.numRings;
2529 value = pUM->devParams.numRxDesc[LM_CLI_IDX_NDIS];
2533 value = pUM->devParams.maxRxFree;
2537 value = pUM->devParams.numTxDesc[LM_CLI_IDX_NDIS];
2541 value = pUM->devParams.maxTxFree;
2545 value = pUM->devParams.rxCopyThreshold;
2549 value = pUM->devParams.txCopyThreshold;
2553 value = pUM->devParams.intrCoalesce;
2557 value = pUM->devParams.intrRxPerSec;
2561 value = pUM->devParams.intrTxPerSec;
2565 value = pUM->devParams.disableMsix;
2569 value = pUM->devParams.l2_fw_flow_ctrl;
2573 value = pUM->devParams.autogreeenEnable;
2577 value = pUM->devParams.lsoEnable;
2581 value = pUM->devParams.logEnable;
2585 value = pUM->devParams.fcoeEnable;
2607 um_device_t * pUM = barg;
2612 BnxeLinkCfg * lnk_cfg = &pUM->curcfg.lnkcfg;
2613 BnxeLinkCfg * hw_cfg = &pUM->hwinit.lnkcfg;
2621 bcopy(&pUM->devParams.mtu[LM_CLI_IDX_NDIS], pr_val, sizeof(u32_t));
2628 link_duplex = pUM->props.link_duplex ?
2637 link_speed = (pUM->props.link_speed * 1000000ULL);
2645 link_state = pUM->props.link_speed ?
2753 return BnxeGetPrivateProperty(pUM,
2771 static void BnxeMacPrivatePropertyInfo(um_device_t * pUM,
2852 um_device_t * pUM = barg;
2946 BnxeMacPrivatePropertyInfo(pUM, pr_name, prh);
3002 boolean_t BnxeGldInit(um_device_t * pUM)
3007 atomic_swap_32(&pUM->plumbed, B_FALSE);
3011 BnxeLogWarn(pUM, "Failed to allocate GLD MAC memory");
3015 pMac->m_driver = pUM;
3016 pMac->m_dip = pUM->pDev;
3020 pMac->m_max_sdu = pUM->devParams.mtu[LM_CLI_IDX_NDIS];
3021 pMac->m_src_addr = &(pUM->lm_dev.params.mac_addr[0]);
3033 (!pUM->devParams.numRings) ? BnxeMacUnicast : NULL;
3038 rc = mac_register(pMac, &pUM->pMac);
3044 BnxeLogWarn(pUM, "Failed to register with GLD (%d)", rc);
3049 mac_link_update(pUM->pMac, LINK_STATE_UNKNOWN);
3055 boolean_t BnxeGldFini(um_device_t * pUM)
3059 if (pUM->plumbed)
3061 BnxeLogWarn(pUM, "Detaching device from GLD that is started!");
3066 if (!BnxeWaitForPacketsFromClient(pUM, LM_CLI_IDX_NDIS))
3071 if (pUM->pMac)
3073 if (mac_unregister(pUM->pMac))
3075 BnxeLogWarn(pUM, "Failed to unregister with the GLD");
3084 void BnxeGldLink(um_device_t * pUM,
3087 mac_link_update(pUM->pMac, state);