Lines Matching refs:cidp
324 void bge_chip_cfg_init(bge_t *bgep, chip_id_t *cidp, boolean_t enable_dma);
328 bge_chip_cfg_init(bge_t *bgep, chip_id_t *cidp, boolean_t enable_dma)
339 (void *)bgep, (void *)cidp, enable_dma));
367 cidp->device = pci_config_get16(handle, PCI_CONF_DEVID);
374 cidp->asic_rev = (mhcr & MHCR_CHIP_REV_MASK);
375 cidp->asic_rev_prod_id = 0;
376 if ((cidp->asic_rev & 0xf0000000) == CHIP_ASIC_REV_USE_PROD_ID_REG) {
382 cidp->asic_rev_prod_id = pci_config_get32(handle, prodid);
385 cidp->businfo = pci_config_get32(handle, PCI_CONF_BGE_PCISTATE);
386 cidp->command = pci_config_get16(handle, PCI_CONF_COMM);
388 cidp->vendor = pci_config_get16(handle, PCI_CONF_VENID);
389 cidp->subven = pci_config_get16(handle, PCI_CONF_SUBVENID);
390 cidp->subdev = pci_config_get16(handle, PCI_CONF_SUBSYSID);
391 cidp->revision = pci_config_get8(handle, PCI_CONF_REVID);
392 cidp->clsize = pci_config_get8(handle, PCI_CONF_CACHE_LINESZ);
393 cidp->latency = pci_config_get8(handle, PCI_CONF_LATENCY_TIMER);
398 cidp->device = DEVICE_ID_5720;
402 cidp->businfo & PCISTATE_BUS_IS_PCI ? "PCI" : "PCI-X",
403 cidp->businfo & PCISTATE_BUS_IS_FAST ? "fast" : "slow",
404 cidp->businfo & PCISTATE_BUS_IS_32_BIT ? "narrow" : "wide",
405 cidp->businfo & PCISTATE_INTA_STATE ? "high" : "low"));
407 cidp->vendor, cidp->device, cidp->revision));
409 cidp->subven, cidp->subdev, cidp->asic_rev));
411 cidp->clsize, cidp->latency, cidp->command));
518 if (((cidp->device == DEVICE_ID_5714C) ||
519 (cidp->device == DEVICE_ID_5714S)) &&
520 (cidp->revision == REVISION_ID_5714_A0)) {
548 if (!((cidp->device == DEVICE_ID_5714C) ||
549 (cidp->device == DEVICE_ID_5715C))) {
562 if (cidp->pci_type == BGE_PCI_E) {
868 chip_id_t *cidp;
879 cidp = &bgep->chipid;
880 if ((cidp->device == DEVICE_ID_5714C) ||
881 (cidp->device == DEVICE_ID_5715C)) {
2548 chip_id_t *cidp;
2557 cidp = &bgep->chipid;
2574 cidp->mbuf_base = bge_mbuf_pool_base;
2575 cidp->mbuf_length = bge_mbuf_pool_len;
2576 cidp->recv_slots = BGE_RECV_SLOTS_USED;
2577 cidp->bge_dma_rwctrl = bge_dma_rwctrl;
2578 cidp->pci_type = BGE_PCI_X;
2579 cidp->statistic_type = BGE_STAT_BLK;
2580 cidp->mbuf_lo_water_rdma = bge_mbuf_lo_water_rdma;
2581 cidp->mbuf_lo_water_rmac = bge_mbuf_lo_water_rmac;
2582 cidp->mbuf_hi_water = bge_mbuf_hi_water;
2583 cidp->rx_ticks_norm = bge_rx_ticks_norm;
2584 cidp->rx_count_norm = bge_rx_count_norm;
2585 cidp->tx_ticks_norm = bge_tx_ticks_norm;
2586 cidp->tx_count_norm = bge_tx_count_norm;
2587 cidp->mask_pci_int = MHCR_MASK_PCI_INT_OUTPUT;
2589 if (cidp->rx_rings == 0 || cidp->rx_rings > BGE_RECV_RINGS_MAX)
2590 cidp->rx_rings = BGE_RECV_RINGS_DEFAULT;
2591 if (cidp->tx_rings == 0 || cidp->tx_rings > BGE_SEND_RINGS_MAX)
2592 cidp->tx_rings = BGE_SEND_RINGS_DEFAULT;
2594 cidp->msi_enabled = B_FALSE;
2596 switch (cidp->device) {
2604 if (cidp->device == DEVICE_ID_5717) {
2605 cidp->chip_label = 5717;
2606 } else if (cidp->device == DEVICE_ID_5718) {
2607 cidp->chip_label = 5718;
2608 } else if (cidp->device == DEVICE_ID_5719) {
2609 cidp->chip_label = 5719;
2610 } else if (cidp->device == DEVICE_ID_5720) {
2613 cidp->chip_label = 5717;
2615 cidp->chip_label = 5720;
2617 } else if (cidp->device == DEVICE_ID_5724) {
2618 cidp->chip_label = 5724;
2619 } else if (cidp->device == DEVICE_ID_5725) {
2620 cidp->chip_label = 5725;
2621 } else /* (cidp->device == DEVICE_ID_5727) */ {
2622 cidp->chip_label = 5727;
2624 cidp->msi_enabled = bge_enable_msi;
2626 cidp->mask_pci_int = LE_32(MHCR_MASK_PCI_INT_OUTPUT);
2628 cidp->bge_dma_rwctrl = LE_32(PDRWCR_VAR_5717);
2629 cidp->pci_type = BGE_PCI_E;
2630 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2631 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5717;
2632 cidp->mbuf_hi_water = MBUF_HIWAT_5717;
2633 cidp->mbuf_base = bge_mbuf_pool_base_5705;
2634 cidp->mbuf_length = bge_mbuf_pool_len_5705;
2635 cidp->recv_slots = BGE_RECV_SLOTS_5705;
2636 cidp->bge_mlcr_default = MLCR_DEFAULT_5717;
2637 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2638 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2639 cidp->statistic_type = BGE_STAT_REG;
2645 cidp->chip_label = 5700;
2646 cidp->flags |= CHIP_FLAG_PARTIAL_CSUM;
2650 cidp->chip_label = 5701;
2652 cidp->flags |= CHIP_FLAG_PARTIAL_CSUM;
2657 cidp->chip_label = 5702;
2659 cidp->flags |= CHIP_FLAG_PARTIAL_CSUM;
2660 cidp->pci_type = BGE_PCI;
2671 cidp->chip_label = cidp->subven == VENDOR_ID_SUN ? 5793 : 5703;
2674 cidp->flags |= CHIP_FLAG_PARTIAL_CSUM;
2680 cidp->chip_label = cidp->subven == VENDOR_ID_SUN ? 5794 : 5704;
2681 cidp->mbuf_base = bge_mbuf_pool_base_5704;
2682 cidp->mbuf_length = bge_mbuf_pool_len_5704;
2684 cidp->flags |= CHIP_FLAG_PARTIAL_CSUM;
2693 if (cidp->device == DEVICE_ID_5754) {
2694 cidp->chip_label = 5754;
2695 cidp->pci_type = BGE_PCI_E;
2697 cidp->chip_label = 5705;
2698 cidp->pci_type = BGE_PCI;
2699 cidp->flags |= CHIP_FLAG_PARTIAL_CSUM;
2701 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2702 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2703 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2704 cidp->mbuf_base = bge_mbuf_pool_base_5705;
2705 cidp->mbuf_length = bge_mbuf_pool_len_5705;
2706 cidp->recv_slots = BGE_RECV_SLOTS_5705;
2707 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2708 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2709 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2710 cidp->statistic_type = BGE_STAT_REG;
2716 cidp->chip_label = 5906;
2717 cidp->pci_type = BGE_PCI_E;
2718 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5906;
2719 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5906;
2720 cidp->mbuf_hi_water = MBUF_HIWAT_5906;
2721 cidp->mbuf_base = bge_mbuf_pool_base;
2722 cidp->mbuf_length = bge_mbuf_pool_len;
2723 cidp->recv_slots = BGE_RECV_SLOTS_5705;
2724 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2725 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2726 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2727 cidp->statistic_type = BGE_STAT_REG;
2732 cidp->chip_label = 5753;
2733 cidp->pci_type = BGE_PCI_E;
2734 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2735 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2736 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2737 cidp->mbuf_base = bge_mbuf_pool_base_5705;
2738 cidp->mbuf_length = bge_mbuf_pool_len_5705;
2739 cidp->recv_slots = BGE_RECV_SLOTS_5705;
2740 cidp->bge_mlcr_default |= MLCR_MISC_PINS_OUTPUT_ENABLE_1;
2741 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2742 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2743 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2744 cidp->statistic_type = BGE_STAT_REG;
2750 cidp->chip_label = 5755;
2751 cidp->pci_type = BGE_PCI_E;
2752 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2753 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2754 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2755 cidp->mbuf_base = bge_mbuf_pool_base_5705;
2756 cidp->mbuf_length = bge_mbuf_pool_len_5705;
2757 cidp->recv_slots = BGE_RECV_SLOTS_5705;
2758 cidp->bge_mlcr_default |= MLCR_MISC_PINS_OUTPUT_ENABLE_1;
2759 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2760 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2761 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2762 if (cidp->device == DEVICE_ID_5755M)
2763 cidp->flags |= CHIP_FLAG_PARTIAL_CSUM;
2764 cidp->statistic_type = BGE_STAT_REG;
2773 cidp->chip_label = 5756;
2774 cidp->pci_type = BGE_PCI_E;
2775 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2776 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2777 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2778 cidp->mbuf_base = bge_mbuf_pool_base_5705;
2779 cidp->mbuf_length = bge_mbuf_pool_len_5705;
2780 cidp->recv_slots = BGE_RECV_SLOTS_5705;
2781 cidp->bge_mlcr_default |= MLCR_MISC_PINS_OUTPUT_ENABLE_1;
2782 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2783 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2784 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2785 cidp->statistic_type = BGE_STAT_REG;
2791 cidp->chip_label = 5787;
2792 cidp->pci_type = BGE_PCI_E;
2793 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2794 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2795 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2796 cidp->mbuf_base = bge_mbuf_pool_base_5705;
2797 cidp->mbuf_length = bge_mbuf_pool_len_5705;
2798 cidp->recv_slots = BGE_RECV_SLOTS_5705;
2799 cidp->bge_mlcr_default |= MLCR_MISC_PINS_OUTPUT_ENABLE_1;
2800 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2801 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2802 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2803 cidp->statistic_type = BGE_STAT_REG;
2811 cidp->msi_enabled = bge_enable_msi;
2820 if (cidp->device == DEVICE_ID_5723)
2821 cidp->chip_label = 5723;
2822 else if (cidp->device == DEVICE_ID_5764)
2823 cidp->chip_label = 5764;
2824 else if (cidp->device == DEVICE_ID_5785)
2825 cidp->chip_label = 5785;
2826 else if (cidp->device == DEVICE_ID_57780)
2827 cidp->chip_label = 57780;
2829 cidp->chip_label = 5761;
2830 cidp->bge_dma_rwctrl = bge_dma_rwctrl_5721;
2831 cidp->pci_type = BGE_PCI_E;
2832 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2833 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2834 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2835 cidp->mbuf_base = bge_mbuf_pool_base_5705;
2836 cidp->mbuf_length = bge_mbuf_pool_len_5705;
2837 cidp->recv_slots = BGE_RECV_SLOTS_5705;
2838 cidp->bge_mlcr_default |= MLCR_MISC_PINS_OUTPUT_ENABLE_1;
2839 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2840 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2841 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2842 cidp->statistic_type = BGE_STAT_REG;
2848 cidp->chip_label = 5780;
2849 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2850 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2851 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2852 cidp->mbuf_base = bge_mbuf_pool_base_5721;
2853 cidp->mbuf_length = bge_mbuf_pool_len_5721;
2854 cidp->recv_slots = BGE_RECV_SLOTS_5721;
2855 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2856 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2857 cidp->statistic_type = BGE_STAT_REG;
2865 cidp->chip_label = 5782;
2866 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2867 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2868 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2869 cidp->mbuf_base = bge_mbuf_pool_base_5705;
2870 cidp->mbuf_length = bge_mbuf_pool_len_5705;
2871 cidp->recv_slots = BGE_RECV_SLOTS_5705;
2872 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2873 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2874 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2875 cidp->flags |= CHIP_FLAG_PARTIAL_CSUM;
2876 cidp->statistic_type = BGE_STAT_REG;
2884 cidp->chip_label = 5788;
2885 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2886 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2887 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2888 cidp->mbuf_base = bge_mbuf_pool_base_5705;
2889 cidp->mbuf_length = bge_mbuf_pool_len_5705;
2890 cidp->recv_slots = BGE_RECV_SLOTS_5705;
2891 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2892 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2893 cidp->statistic_type = BGE_STAT_REG;
2894 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2899 if (cidp->revision >= REVISION_ID_5714_A2)
2900 cidp->msi_enabled = bge_enable_msi;
2903 cidp->chip_label = 5714;
2904 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2905 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2906 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2907 cidp->mbuf_base = bge_mbuf_pool_base_5721;
2908 cidp->mbuf_length = bge_mbuf_pool_len_5721;
2909 cidp->recv_slots = BGE_RECV_SLOTS_5721;
2910 cidp->bge_dma_rwctrl = bge_dma_rwctrl_5714;
2911 cidp->bge_mlcr_default = bge_mlcr_default_5714;
2912 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2913 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2914 cidp->pci_type = BGE_PCI_E;
2915 cidp->statistic_type = BGE_STAT_REG;
2921 cidp->chip_label = 5715;
2922 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2923 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2924 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2925 cidp->mbuf_base = bge_mbuf_pool_base_5721;
2926 cidp->mbuf_length = bge_mbuf_pool_len_5721;
2927 cidp->recv_slots = BGE_RECV_SLOTS_5721;
2928 cidp->bge_dma_rwctrl = bge_dma_rwctrl_5715;
2929 cidp->bge_mlcr_default = bge_mlcr_default_5714;
2930 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2931 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2932 cidp->pci_type = BGE_PCI_E;
2933 cidp->statistic_type = BGE_STAT_REG;
2934 if (cidp->revision >= REVISION_ID_5715_A2)
2935 cidp->msi_enabled = bge_enable_msi;
2940 cidp->chip_label = 5721;
2941 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2942 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2943 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2944 cidp->mbuf_base = bge_mbuf_pool_base_5721;
2945 cidp->mbuf_length = bge_mbuf_pool_len_5721;
2946 cidp->recv_slots = BGE_RECV_SLOTS_5721;
2947 cidp->bge_dma_rwctrl = bge_dma_rwctrl_5721;
2948 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2949 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2950 cidp->pci_type = BGE_PCI_E;
2951 cidp->statistic_type = BGE_STAT_REG;
2952 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2957 cidp->chip_label = 5722;
2958 cidp->pci_type = BGE_PCI_E;
2959 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2960 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2961 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2962 cidp->mbuf_base = bge_mbuf_pool_base_5705;
2963 cidp->mbuf_length = bge_mbuf_pool_len_5705;
2964 cidp->recv_slots = BGE_RECV_SLOTS_5705;
2965 cidp->bge_mlcr_default |= MLCR_MISC_PINS_OUTPUT_ENABLE_1;
2966 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2967 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2968 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2969 cidp->statistic_type = BGE_STAT_REG;
2975 cidp->chip_label = 5751;
2976 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2977 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2978 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2979 cidp->mbuf_base = bge_mbuf_pool_base_5721;
2980 cidp->mbuf_length = bge_mbuf_pool_len_5721;
2981 cidp->recv_slots = BGE_RECV_SLOTS_5721;
2982 cidp->bge_dma_rwctrl = bge_dma_rwctrl_5721;
2983 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
2984 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
2985 cidp->pci_type = BGE_PCI_E;
2986 cidp->statistic_type = BGE_STAT_REG;
2987 cidp->flags |= CHIP_FLAG_NO_JUMBO;
2993 cidp->chip_label = 5752;
2994 cidp->mbuf_lo_water_rdma = RDMA_MBUF_LOWAT_5705;
2995 cidp->mbuf_lo_water_rmac = MAC_RX_MBUF_LOWAT_5705;
2996 cidp->mbuf_hi_water = MBUF_HIWAT_5705;
2997 cidp->mbuf_base = bge_mbuf_pool_base_5721;
2998 cidp->mbuf_length = bge_mbuf_pool_len_5721;
2999 cidp->recv_slots = BGE_RECV_SLOTS_5721;
3000 cidp->bge_dma_rwctrl = bge_dma_rwctrl_5721;
3001 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
3002 cidp->tx_rings = BGE_SEND_RINGS_MAX_5705;
3003 cidp->pci_type = BGE_PCI_E;
3004 cidp->statistic_type = BGE_STAT_REG;
3005 cidp->flags |= CHIP_FLAG_NO_JUMBO;
3010 cidp->chip_label = 5789;
3011 cidp->mbuf_base = bge_mbuf_pool_base_5721;
3012 cidp->mbuf_length = bge_mbuf_pool_len_5721;
3013 cidp->recv_slots = BGE_RECV_SLOTS_5721;
3014 cidp->bge_dma_rwctrl = bge_dma_rwctrl_5721;
3015 cidp->rx_rings = BGE_RECV_RINGS_MAX_5705;
3016 cidp->tx_rings = BGE_RECV_RINGS_MAX_5705;
3017 cidp->pci_type = BGE_PCI_E;
3018 cidp->statistic_type = BGE_STAT_REG;
3019 cidp->flags |= CHIP_FLAG_PARTIAL_CSUM;
3020 cidp->flags |= CHIP_FLAG_NO_JUMBO;
3021 cidp->msi_enabled = B_TRUE;
3030 cidp->ethmax_size = ETHERMAX;
3031 cidp->snd_buff_size = BGE_SEND_BUFF_SIZE_DEFAULT;
3032 cidp->std_buf_size = BGE_STD_BUFF_SIZE;
3045 if (!(cidp->flags & CHIP_FLAG_NO_JUMBO) &&
3046 (cidp->default_mtu > BGE_DEFAULT_MTU)) {
3050 cidp->mbuf_lo_water_rdma =
3052 cidp->mbuf_lo_water_rmac =
3054 cidp->mbuf_hi_water = MBUF_HIWAT_5714_JUMBO;
3055 cidp->jumbo_slots = 0;
3056 cidp->std_buf_size = BGE_JUMBO_BUFF_SIZE;
3058 cidp->mbuf_lo_water_rdma =
3060 cidp->mbuf_lo_water_rmac =
3062 cidp->mbuf_hi_water = MBUF_HIWAT_JUMBO;
3063 cidp->jumbo_slots = BGE_JUMBO_SLOTS_USED;
3065 cidp->recv_jumbo_size = BGE_JUMBO_BUFF_SIZE;
3066 cidp->snd_buff_size = BGE_SEND_BUFF_SIZE_JUMBO;
3067 cidp->ethmax_size = cidp->default_mtu +
3074 cidp->nvtype = bge_nvmem_id(bgep);
3086 if (cidp->chip_label == 0)
3089 cidp->vendor, cidp->device, cidp->device);
3093 cidp->vendor, cidp->device, cidp->chip_label,
3094 cidp->revision);
3096 cidp->flags |= CHIP_FLAG_SUPPORTED;