Cross Reference: /illumos-gate/usr/src/uts/common/io/bge/bge

Lines Matching defs:regno
176 static void bge_cfg_clr16(bge_t *bgep, bge_regno_t regno, uint16_t bits);
180 bge_cfg_clr16(bge_t *bgep, bge_regno_t regno, uint16_t bits)
185 	    (void *)bgep, regno, bits));
187 	regval = pci_config_get16(bgep->cfg_handle, regno);
190 	    (void *)bgep, regno, bits, regval, regval & ~bits));
193 	pci_config_put16(bgep->cfg_handle, regno, regval);
198 static void bge_cfg_clr32(bge_t *bgep, bge_regno_t regno, uint32_t bits);
202 bge_cfg_clr32(bge_t *bgep, bge_regno_t regno, uint32_t bits)
207 	    (void *)bgep, regno, bits));
209 	regval = pci_config_get32(bgep->cfg_handle, regno);
212 	    (void *)bgep, regno, bits, regval, regval & ~bits));
215 	pci_config_put32(bgep->cfg_handle, regno, regval);
234 uint32_t bge_ind_get32(bge_t *bgep, bge_regno_t regno);
238 bge_ind_get32(bge_t *bgep, bge_regno_t regno)
242 	BGE_TRACE(("bge_ind_get32($%p, 0x%lx)", (void *)bgep, regno));
247 		regno = LE_32(regno);
250 	pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_RIAAR, regno);
254 	    (void *)bgep, regno, val));
261 void bge_ind_put32(bge_t *bgep, bge_regno_t regno, uint32_t val);
265 bge_ind_put32(bge_t *bgep, bge_regno_t regno, uint32_t val)
268 	    (void *)bgep, regno, val));
274 		regno = LE_32(regno);
277 	pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_RIAAR, regno);
601 uint32_t bge_reg_get32(bge_t *bgep, bge_regno_t regno);
605 bge_reg_get32(bge_t *bgep, bge_regno_t regno)
608 	    (void *)bgep, regno));
610 	return (ddi_get32(bgep->io_handle, PIO_ADDR(bgep, regno)));
613 void bge_reg_put32(bge_t *bgep, bge_regno_t regno, uint32_t data);
617 bge_reg_put32(bge_t *bgep, bge_regno_t regno, uint32_t data)
620 	    (void *)bgep, regno, data));
622 	ddi_put32(bgep->io_handle, PIO_ADDR(bgep, regno), data);
626 void bge_reg_set32(bge_t *bgep, bge_regno_t regno, uint32_t bits);
630 bge_reg_set32(bge_t *bgep, bge_regno_t regno, uint32_t bits)
635 	    (void *)bgep, regno, bits));
637 	regval = bge_reg_get32(bgep, regno);
639 	bge_reg_put32(bgep, regno, regval);
642 void bge_reg_clr32(bge_t *bgep, bge_regno_t regno, uint32_t bits);
646 bge_reg_clr32(bge_t *bgep, bge_regno_t regno, uint32_t bits)
651 	    (void *)bgep, regno, bits));
653 	regval = bge_reg_get32(bgep, regno);
655 	bge_reg_put32(bgep, regno, regval);
658 static uint64_t bge_reg_get64(bge_t *bgep, bge_regno_t regno);
662 bge_reg_get64(bge_t *bgep, bge_regno_t regno)
671 		regval = ddi_get32(bgep->io_handle, PIO_ADDR(bgep, regno + 4));
673 		regval |= ddi_get32(bgep->io_handle, PIO_ADDR(bgep, regno));
675 		regval = ddi_get64(bgep->io_handle, PIO_ADDR(bgep, regno));
681 		regval = ddi_get32(bgep->io_handle, PIO_ADDR(bgep, regno));
683 		regval |= ddi_get32(bgep->io_handle, PIO_ADDR(bgep, regno + 4));
685 		regval = ddi_get64(bgep->io_handle, PIO_ADDR(bgep, regno));
688 	regval = ddi_get64(bgep->io_handle, PIO_ADDR(bgep, regno));
696 	    (void *)bgep, regno, regval));
701 static void bge_reg_put64(bge_t *bgep, bge_regno_t regno, uint64_t data);
705 bge_reg_put64(bge_t *bgep, bge_regno_t regno, uint64_t data)
708 	    (void *)bgep, regno, data));
720 		    PIO_ADDR(bgep, regno), (uint32_t)data);
723 		    PIO_ADDR(bgep, regno + 4), (uint32_t)(data >> 32));
726 		ddi_put64(bgep->io_handle, PIO_ADDR(bgep, regno), data);
733 		    PIO_ADDR(bgep, regno + 4), (uint32_t)data);
736 		    PIO_ADDR(bgep, regno), (uint32_t)(data >> 32));
738 		ddi_put64(bgep->io_handle, PIO_ADDR(bgep, regno), data);
741 	ddi_put64(bgep->io_handle, PIO_ADDR(bgep, regno), data);
770 void bge_mbx_put(bge_t *bgep, bge_regno_t regno, uint64_t data);
774 bge_mbx_put(bge_t *bgep, bge_regno_t regno, uint64_t data)
777 		regno += INTERRUPT_LP_MBOX_0_REG - INTERRUPT_MBOX_0_REG + 4;
780 	    (void *)bgep, regno, data));
790 	ddi_put32(bgep->io_handle, PIO_ADDR(bgep, regno+4), (uint32_t)data);
792 	ddi_put32(bgep->io_handle, PIO_ADDR(bgep, regno), (uint32_t)data);
797 uint32_t bge_mbx_get(bge_t *bgep, bge_regno_t regno);
801 bge_mbx_get(bge_t *bgep, bge_regno_t regno)
806 		regno += INTERRUPT_LP_MBOX_0_REG - INTERRUPT_MBOX_0_REG + 4;
809 	    (void *)bgep, regno));
812 	val32 = ddi_get32(bgep->io_handle, PIO_ADDR(bgep, regno+4));
814 	val32 = ddi_get32(bgep->io_handle, PIO_ADDR(bgep, regno));
819 	    (void *)bgep, regno, val32));
1155 static uint16_t bge_mii_access(bge_t *bgep, bge_regno_t regno,
1160 bge_mii_access(bge_t *bgep, bge_regno_t regno, uint16_t data, uint32_t cmd)
1167 	    (void *)bgep, regno, data, cmd));
1175 	cmd |= regno << MI_COMMS_REGISTER_SHIFT;
1267 uint16_t bge_mii_get16(bge_t *bgep, bge_regno_t regno);
1271 bge_mii_get16(bge_t *bgep, bge_regno_t regno)
1274 	    (void *)bgep, regno));
1278 	if (DEVICE_5906_SERIES_CHIPSETS(bgep) && ((regno == MII_AUX_CONTROL) ||
1279 	    (regno == MII_MSCONTROL)))
1282 	return (bge_mii_access(bgep, regno, 0, MI_COMMS_COMMAND_READ));
1285 void bge_mii_put16(bge_t *bgep, bge_regno_t regno, uint16_t data);
1289 bge_mii_put16(bge_t *bgep, bge_regno_t regno, uint16_t data)
1292 	    (void *)bgep, regno, data));
1296 	if (DEVICE_5906_SERIES_CHIPSETS(bgep) && ((regno == MII_AUX_CONTROL) ||
1297 	    (regno == MII_MSCONTROL)))
1300 	(void) bge_mii_access(bgep, regno, data, MI_COMMS_COMMAND_WRITE);
1304 bge_phydsp_read(bge_t *bgep, bge_regno_t regno)
1307 	          (void *)bgep, regno));
1311 	bge_mii_put16(bgep, MII_DSP_ADDRESS, regno);
1318 bge_phydsp_write(bge_t *bgep, bge_regno_t regno, uint16_t data)
1321 	          (void *)bgep, regno, data));
1325 	bge_mii_put16(bgep, MII_DSP_ADDRESS, regno);
2071 uint32_t bge_ape_get32(bge_t *bgep, bge_regno_t regno);
2075 bge_ape_get32(bge_t *bgep, bge_regno_t regno)
2078 	    (void *)bgep, regno));
2080 	return (ddi_get32(bgep->ape_handle, APE_ADDR(bgep, regno)));
2083 void bge_ape_put32(bge_t *bgep, bge_regno_t regno, uint32_t data);
2087 bge_ape_put32(bge_t *bgep, bge_regno_t regno, uint32_t data)
2090 	    (void *)bgep, regno, data));
2092 	ddi_put32(bgep->ape_handle, APE_ADDR(bgep, regno), data);
3134 static boolean_t bge_chip_poll_engine(bge_t *bgep, bge_regno_t regno,
3139 bge_chip_poll_engine(bge_t *bgep, bge_regno_t regno,
3146 	    (void *)bgep, regno, mask, val));
3149 		regval = bge_reg_get32(bgep, regno);
3155 	bge_problem(bgep, "bge_chip_poll_engine failed: regno = 0x%lx", regno);
3176 static boolean_t bge_chip_reset_engine(bge_t *bgep, bge_regno_t regno);
3180 bge_chip_reset_engine(bge_t *bgep, bge_regno_t regno)
3187 	regval = bge_reg_get32(bgep, regno);
3190 	    (void *)bgep, regno));
3192 	    regno, regval));
3196 	switch (regno) {
3234 				bge_reg_set32(bgep, regno,
3251 		ddi_put32(bgep->io_handle, PIO_ADDR(bgep, regno), regval);
3313 		bge_reg_put32(bgep, regno, regval);
3314 		return (bge_chip_poll_engine(bgep, regno,
3329 static boolean_t bge_chip_disable_engine(bge_t *bgep, bge_regno_t regno,
3334 bge_chip_disable_engine(bge_t *bgep, bge_regno_t regno, uint32_t morebits)
3339 	    (void *)bgep, regno, morebits));
3341 	switch (regno) {
3357 		bge_reg_put32(bgep, regno, ~(uint32_t)0);
3359 		bge_reg_put32(bgep, regno, 0);
3367 		if ((regno == RCV_LIST_SELECTOR_MODE_REG) ||
3368 		    (regno == DMA_COMPLETION_MODE_REG) ||
3369 		    (regno == MBUF_CLUSTER_FREE_MODE_REG) ||
3370 		    (regno == BUFFER_MANAGER_MODE_REG) ||
3371 		    (regno == MEMORY_ARBITER_MODE_REG)) {
3378 	regval = bge_reg_get32(bgep, regno);
3381 	bge_reg_put32(bgep, regno, regval);
3383 	return bge_chip_poll_engine(bgep, regno, STATE_MACHINE_ENABLE_BIT, 0);
3396 static boolean_t bge_chip_enable_engine(bge_t *bgep, bge_regno_t regno,
3401 bge_chip_enable_engine(bge_t *bgep, bge_regno_t regno, uint32_t morebits)
3406 	    (void *)bgep, regno, morebits));
3408 	switch (regno) {
3421 		bge_reg_put32(bgep, regno, ~(uint32_t)0);
3423 		bge_reg_put32(bgep, regno, 0);
3427 		regval = bge_reg_get32(bgep, regno);
3430 		bge_reg_put32(bgep, regno, regval);
3431 		return (bge_chip_poll_engine(bgep, regno,
3721 	bge_regno_t regno;
5565 	uint64_t regno;
5570 	regno = ppd->pp_acc_offset;
5574 		regval = pci_config_get8(bgep->cfg_handle, regno);
5578 		regval = pci_config_get16(bgep->cfg_handle, regno);
5582 		regval = pci_config_get32(bgep->cfg_handle, regno);
5586 		regval = pci_config_get64(bgep->cfg_handle, regno);
5600 	uint64_t regno;
5605 	regno = ppd->pp_acc_offset;
5610 		pci_config_put8(bgep->cfg_handle, regno, regval);
5614 		pci_config_put16(bgep->cfg_handle, regno, regval);
5618 		pci_config_put32(bgep->cfg_handle, regno, regval);
5622 		pci_config_put64(bgep->cfg_handle, regno, regval);