Lines Matching refs:dev
139 struct solo_dev *dev;
177 struct solo_dev *dev;
238 solo_dspready(solo_dev_t *dev)
240 return ((PORT_RD8(dev->sb, 0xc) & 0x80) == 0 ? true : false);
244 solo_dspwr(solo_dev_t *dev, uint8_t val)
249 if (solo_dspready(dev)) {
250 PORT_WR8(dev->sb, 0xc, val);
256 audio_dev_warn(dev->adev, "solo_dspwr(0x%02x) timed out", val);
261 solo_cmd(solo_dev_t *dev, uint8_t val)
263 return (solo_dspwr(dev, val));
267 solo_cmd1(solo_dev_t *dev, uint8_t cmd, uint8_t val)
269 if (solo_dspwr(dev, cmd)) {
270 (void) solo_dspwr(dev, val);
275 solo_setmixer(solo_dev_t *dev, uint8_t port, uint8_t value)
277 PORT_WR8(dev->sb, 0x4, port); /* Select register */
279 PORT_WR8(dev->sb, 0x5, value);
284 solo_getmixer(solo_dev_t *dev, uint8_t port)
288 PORT_WR8(dev->sb, 0x4, port); /* Select register */
290 val = PORT_RD8(dev->sb, 0x5);
297 solo_get_byte(solo_dev_t *dev)
300 if (PORT_RD8(dev->sb, 0xc) & 0x40)
301 return (PORT_RD8(dev->sb, 0xa));
305 audio_dev_warn(dev->adev, "timeout waiting to read DSP port");
310 solo_write(solo_dev_t *dev, uint8_t reg, uint8_t val)
312 solo_cmd1(dev, reg, val);
316 solo_read(solo_dev_t *dev, uint8_t reg)
318 if (solo_cmd(dev, 0xc0) && solo_cmd(dev, reg)) {
319 return (solo_get_byte(dev));
325 solo_reset_dsp(solo_dev_t *dev)
327 PORT_WR8(dev->sb, 0x6, 3);
329 PORT_WR8(dev->sb, 0x6, 0);
330 if (solo_get_byte(dev) != 0xAA) {
331 audio_dev_warn(dev->adev, "solo_reset_dsp failed");
340 solo_dev_t *dev = (void *)arg1;
346 mutex_enter(&dev->mutex);
348 if (dev->suspended) {
349 mutex_exit(&dev->mutex);
353 status = PORT_RD8(dev->io, 0x7);
357 solo_setmixer(dev, 0x7a, solo_getmixer(dev, 0x7a) & ~0x80);
363 (void) PORT_RD8(dev->sb, 0xe);
365 mutex_exit(&dev->mutex);
371 solo_mixer_scale(solo_dev_t *dev, solo_ctrl_num_t num)
374 uint64_t value = dev->ctrls[num].val;
385 solo_configure_mixer(solo_dev_t *dev)
395 solo_setmixer(dev, 0x64, solo_getmixer(dev, 0x64) | 0xc);
396 solo_setmixer(dev, 0x66, 0);
400 v = (dev->ctrls[CTL_FRONT].val >> 8) & 0xff;
402 solo_setmixer(dev, 0x60, v & 0xff);
405 v = dev->ctrls[CTL_FRONT].val & 0xff;
407 solo_setmixer(dev, 0x62, v & 0xff);
409 v = solo_mixer_scale(dev, CTL_VOLUME);
411 solo_setmixer(dev, 0x7c, v & 0xff);
412 solo_setmixer(dev, 0x14, v & 0xff);
414 mon = dev->ctrls[CTL_MONSRC].val;
415 rec = dev->ctrls[CTL_RECSRC].val;
421 v = solo_mixer_scale(dev, CTL_MIC);
422 solo_setmixer(dev, 0x68, rec & (1 << INPUT_MIC) ? v : 0);
423 solo_setmixer(dev, 0x1a, mon & (1 << INPUT_MIC) ? v : 0);
425 v = solo_mixer_scale(dev, CTL_LINE);
426 solo_setmixer(dev, 0x6e, rec & (1 << INPUT_LINE) ? v : 0);
427 solo_setmixer(dev, 0x3e, mon & (1 << INPUT_LINE) ? v : 0);
429 v = solo_mixer_scale(dev, CTL_CD);
430 solo_setmixer(dev, 0x6a, rec & (1 << INPUT_CD) ? v : 0);
431 solo_setmixer(dev, 0x38, mon & (1 << INPUT_CD) ? v : 0);
433 v = solo_mixer_scale(dev, CTL_AUX);
434 solo_setmixer(dev, 0x6c, rec & (1 << INPUT_AUX) ? v : 0);
435 solo_setmixer(dev, 0x3a, mon & (1 << INPUT_AUX) ? v : 0);
437 v = solo_mixer_scale(dev, CTL_MONO);
439 solo_setmixer(dev, 0x6f, rec & (1 << INPUT_MONO) ? v : 0);
440 solo_setmixer(dev, 0x6d, mon & (1 << INPUT_MONO) ? v : 0);
442 if (dev->ctrls[CTL_MICBOOST].val) {
443 solo_setmixer(dev, 0x7d, solo_getmixer(dev, 0x7d) | 0x8);
445 solo_setmixer(dev, 0x7d, solo_getmixer(dev, 0x7d) & ~(0x8));
448 v = solo_mixer_scale(dev, CTL_RECGAIN);
450 solo_write(dev, 0xb4, v & 0xff);
452 v = dev->ctrls[CTL_SPEAKER].val & 0xff;
454 solo_setmixer(dev, 0x3c, v & 0xff);
456 if (dev->ctrls[CTL_LOOPBACK].val) {
458 solo_setmixer(dev, 0x1c, 0x3);
461 solo_setmixer(dev, 0x1c, 0x5);
470 solo_dev_t *dev = pc->dev;
475 mutex_enter(&dev->mutex);
477 solo_configure_mixer(dev);
478 mutex_exit(&dev->mutex);
486 solo_dev_t *dev = pc->dev;
494 mutex_enter(&dev->mutex);
496 solo_configure_mixer(dev);
497 mutex_exit(&dev->mutex);
505 solo_dev_t *dev = pc->dev;
515 mutex_enter(&dev->mutex);
517 solo_configure_mixer(dev);
518 mutex_exit(&dev->mutex);
526 solo_dev_t *dev = pc->dev;
528 mutex_enter(&dev->mutex);
530 solo_configure_mixer(dev);
531 mutex_exit(&dev->mutex);
539 solo_dev_t *dev = pc->dev;
541 mutex_enter(&dev->mutex);
543 mutex_exit(&dev->mutex);
555 solo_alloc_ctrl(solo_dev_t *dev, uint32_t num, uint64_t val)
563 pc = &dev->ctrls[num];
565 pc->dev = dev;
693 pc->ctrl = audio_dev_add_control(dev->adev, &desc,
698 solo_add_controls(solo_dev_t *dev)
700 solo_alloc_ctrl(dev, CTL_VOLUME, 0x4b);
701 solo_alloc_ctrl(dev, CTL_FRONT, 0x5a5a);
702 solo_alloc_ctrl(dev, CTL_SPEAKER, 0x4b);
703 solo_alloc_ctrl(dev, CTL_MIC, 0x3232);
704 solo_alloc_ctrl(dev, CTL_LINE, 0x4b4b);
705 solo_alloc_ctrl(dev, CTL_CD, 0x4b4b);
706 solo_alloc_ctrl(dev, CTL_AUX, 0);
707 solo_alloc_ctrl(dev, CTL_MONO, 0);
708 solo_alloc_ctrl(dev, CTL_RECSRC, (1U << INPUT_MIC));
709 solo_alloc_ctrl(dev, CTL_MONSRC, 0);
710 solo_alloc_ctrl(dev, CTL_RECGAIN, 0x4b4b);
711 solo_alloc_ctrl(dev, CTL_MICBOOST, 1);
712 solo_alloc_ctrl(dev, CTL_LOOPBACK, 0);
731 solo_dev_t *dev = e->dev;
738 ASSERT(mutex_owned(&dev->mutex));
751 ptr = PORT_RD32(dev->vc, 0);
752 count = PORT_RD16(dev->vc, 4);
756 ptr = dev->last_capture;
762 PORT_WR8(dev->vc, 0xf, 0); /* restart DMA */
774 dev->last_capture = ptr;
789 solo_dev_t *dev = e->dev;
793 ASSERT(mutex_owned(&dev->mutex));
800 solo_write(dev, 0xa1, 0xf0);
802 solo_write(dev, 0xa2, solo_calcfilter(SOLO_RATE));
806 solo_write(dev, 0xa8, (solo_read(dev, 0xa8) & ~0x03) | 1);
808 (void) solo_cmd(dev, 0xd3); /* turn off DAC1 output */
811 solo_write(dev, 0xb7, 0x71);
812 solo_write(dev, 0xb7, 0xbc);
814 v = solo_mixer_scale(dev, CTL_RECGAIN);
816 solo_write(dev, 0xb4, v & 0xff);
818 PORT_WR8(dev->vc, 0x8, 0xc4); /* command */
819 PORT_WR8(dev->vc, 0xd, 0xff); /* clear DMA */
820 PORT_WR8(dev->vc, 0xf, 0x01); /* stop DMA */
822 PORT_WR8(dev->vc, 0xd, 0xff); /* reset */
823 PORT_WR8(dev->vc, 0xf, 0x01); /* mask */
824 PORT_WR8(dev->vc, 0xb, 0x14); /* mode */
826 PORT_WR32(dev->vc, 0x0, e->paddr);
827 PORT_WR16(dev->vc, 0x4, SOLO_BUFSZ - 1);
830 solo_write(dev, 0xa4, len & 0x00ff);
831 solo_write(dev, 0xa5, (len & 0xff00) >> 8);
834 solo_write(dev, 0xb8, 0x0f);
835 PORT_WR8(dev->vc, 0xf, 0); /* start DMA */
837 dev->last_capture = e->paddr;
844 solo_dev_t *dev = e->dev;
847 solo_write(dev, 0xb8, solo_read(dev, 0xb8) & ~0x01);
854 solo_dev_t *dev = e->dev;
857 ASSERT(mutex_owned(&dev->mutex));
859 offset = SOLO_BUFSZ - PORT_RD16(dev->io, 0x4);
873 solo_dev_t *dev = e->dev;
877 ASSERT(mutex_owned(&dev->mutex));
884 solo_setmixer(dev, 0x78, 0x10);
886 solo_setmixer(dev, 0x70, 0xf0);
887 solo_setmixer(dev, 0x72, solo_calcfilter(SOLO_RATE));
889 solo_setmixer(dev, 0x74, len & 0x00ff);
890 solo_setmixer(dev, 0x76, (len & 0xff00) >> 8);
892 solo_setmixer(dev, 0x7a, 0x47);
894 PORT_WR8(dev->io, 0x6, 0);
895 PORT_WR32(dev->io, 0x0, e->paddr);
896 PORT_WR16(dev->io, 0x4, SOLO_BUFSZ);
900 solo_setmixer(dev, 0x78, 0x92);
902 solo_setmixer(dev, 0x78, 0x93);
904 PORT_WR8(dev->io, 0x6, 0x0a); /* autoinit, enable */
906 v = solo_mixer_scale(dev, CTL_VOLUME);
908 solo_setmixer(dev, 0x7c, v & 0xff);
916 solo_dev_t *dev = e->dev;
919 PORT_WR8(dev->io, 0x6, 0);
920 solo_setmixer(dev, 0x78, solo_getmixer(dev, 0x78) & ~0x03);
977 solo_dev_t *dev = e->dev;
980 mutex_enter(&dev->mutex);
983 mutex_exit(&dev->mutex);
992 solo_dev_t *dev = e->dev;
999 mutex_enter(&dev->mutex);
1002 mutex_exit(&dev->mutex);
1011 solo_dev_t *dev = e->dev;
1013 mutex_enter(&dev->mutex);
1016 mutex_exit(&dev->mutex);
1024 solo_dev_t *dev = e->dev;
1026 mutex_enter(&dev->mutex);
1031 mutex_exit(&dev->mutex);
1040 solo_dev_t *dev = e->dev;
1042 mutex_enter(&dev->mutex);
1047 mutex_exit(&dev->mutex);
1068 solo_release_resources(solo_dev_t *dev)
1070 if (dev->ihandle != NULL) {
1071 (void) ddi_intr_disable(dev->ihandle);
1072 (void) ddi_intr_remove_handler(dev->ihandle);
1073 (void) ddi_intr_free(dev->ihandle);
1074 mutex_destroy(&dev->mutex);
1077 if (dev->io.acch != NULL) {
1078 ddi_regs_map_free(&dev->io.acch);
1081 if (dev->sb.acch != NULL) {
1082 ddi_regs_map_free(&dev->sb.acch);
1085 if (dev->vc.acch != NULL) {
1086 ddi_regs_map_free(&dev->vc.acch);
1089 if (dev->pcih != NULL) {
1090 pci_config_teardown(&dev->pcih);
1094 if (dev->play.paddr != 0)
1095 (void) ddi_dma_unbind_handle(dev->play.dmah);
1096 if (dev->play.acch != NULL)
1097 ddi_dma_mem_free(&dev->play.acch);
1098 if (dev->play.dmah != NULL)
1099 ddi_dma_free_handle(&dev->play.dmah);
1101 if (dev->play.engine != NULL) {
1102 audio_dev_remove_engine(dev->adev, dev->play.engine);
1103 audio_engine_free(dev->play.engine);
1107 if (dev->rec.paddr != 0)
1108 (void) ddi_dma_unbind_handle(dev->rec.dmah);
1109 if (dev->rec.acch != NULL)
1110 ddi_dma_mem_free(&dev->rec.acch);
1111 if (dev->rec.dmah != NULL)
1112 ddi_dma_free_handle(&dev->rec.dmah);
1114 if (dev->rec.engine != NULL) {
1115 audio_dev_remove_engine(dev->adev, dev->rec.engine);
1116 audio_engine_free(dev->rec.engine);
1120 if (dev->ctrls[i].ctrl != NULL) {
1121 audio_dev_del_control(dev->ctrls[i].ctrl);
1125 if (dev->adev != NULL) {
1126 audio_dev_free(dev->adev);
1129 kmem_free(dev, sizeof (*dev));
1133 solo_setup_interrupts(solo_dev_t *dev)
1138 if ((ddi_intr_alloc(dev->dip, &dev->ihandle, DDI_INTR_TYPE_FIXED,
1141 audio_dev_warn(dev->adev, "can't alloc intr handle");
1145 if (ddi_intr_get_pri(dev->ihandle, &ipri) != DDI_SUCCESS) {
1146 audio_dev_warn(dev->adev, "can't determine intr priority");
1147 (void) ddi_intr_free(dev->ihandle);
1148 dev->ihandle = NULL;
1152 if (ddi_intr_add_handler(dev->ihandle, solo_intr, dev,
1154 audio_dev_warn(dev->adev, "can't add intr handler");
1155 (void) ddi_intr_free(dev->ihandle);
1156 dev->ihandle = NULL;
1160 mutex_init(&dev->mutex, NULL, MUTEX_DRIVER, DDI_INTR_PRI(ipri));
1166 solo_map_registers(solo_dev_t *dev)
1168 dev_info_t *dip = dev->dip;
1171 if (ddi_regs_map_setup(dip, 1, &dev->io.base, 0, 0, &acc_attr,
1172 &dev->io.acch) != DDI_SUCCESS) {
1173 audio_dev_warn(dev->adev, "can't map IO registers");
1176 if (ddi_regs_map_setup(dip, 2, &dev->sb.base, 0, 0, &acc_attr,
1177 &dev->sb.acch) != DDI_SUCCESS) {
1178 audio_dev_warn(dev->adev, "can't map SB registers");
1181 if (ddi_regs_map_setup(dip, 3, &dev->vc.base, 0, 0, &acc_attr,
1182 &dev->vc.acch) != DDI_SUCCESS) {
1183 audio_dev_warn(dev->adev, "can't map VC registers");
1195 solo_init_hw(solo_dev_t *dev)
1204 pci_config_put16(dev->pcih, ESS_PCI_LEGACYCONTROL, 0x8041);
1210 data = pci_config_get32(dev->pcih, PCI_CONF_BASE2);
1212 pci_config_put16(dev->pcih, ESS_PCI_DDMACONTROL, data & 0xffff);
1218 pci_config_put16(dev->pcih, ESS_PCI_CONFIG, 0);
1220 if (!solo_reset_dsp(dev))
1224 (void) solo_cmd(dev, 0xc6);
1227 PORT_WR8(dev->io, 0x7, 0x30); /* enable audio irqs */
1230 solo_write(dev, 0xb9, 0x01);
1237 solo_setmixer(dev, 0x71, 0x2a);
1240 solo_write(dev, 0xb1, (solo_read(dev, 0xb1) & 0x0f) | 0x50);
1242 solo_write(dev, 0xb2, (solo_read(dev, 0xb2) & 0x0f) | 0x50);
1244 solo_setmixer(dev, 0, 0); /* reset mixer settings */
1246 solo_configure_mixer(dev);
1251 solo_alloc_engine(solo_dev_t *dev, int engno)
1266 e = &dev->rec;
1280 e = &dev->play;
1294 audio_dev_warn(dev->adev, "bad engine number!");
1298 e->dev = dev;
1300 if (ddi_dma_alloc_handle(dev->dip, dattr, DDI_DMA_SLEEP, NULL,
1302 audio_dev_warn(dev->adev, "%s dma handle alloc failed", desc);
1308 audio_dev_warn(dev->adev, "%s dma memory alloc failed", desc);
1315 audio_dev_warn(dev->adev, "%s dma binding failed", desc);
1325 audio_dev_warn(dev->adev, "record audio_engine_alloc failed");
1330 audio_dev_add_engine(dev->adev, e->engine);
1337 solo_suspend(solo_dev_t *dev)
1339 audio_dev_suspend(dev->adev);
1341 mutex_enter(&dev->mutex);
1342 dev->suspended = true;
1343 mutex_exit(&dev->mutex);
1349 solo_resume(solo_dev_t *dev)
1351 mutex_enter(&dev->mutex);
1352 if (!solo_init_hw(dev)) {
1354 audio_dev_warn(dev->adev, "unable to resume audio!");
1355 audio_dev_warn(dev->adev, "reboot or reload driver to reset");
1357 dev->suspended = false;
1358 mutex_exit(&dev->mutex);
1360 audio_dev_resume(dev->adev);
1368 solo_dev_t *dev;
1371 dev = kmem_zalloc(sizeof (*dev), KM_SLEEP);
1372 dev->dip = dip;
1373 ddi_set_driver_private(dip, dev);
1375 dev->adev = audio_dev_alloc(dip, 0);
1376 if (dev->adev == NULL)
1379 audio_dev_set_description(dev->adev, "ESS Solo-1 PCI AudioDrive");
1380 audio_dev_set_version(dev->adev, "ES1938");
1382 if (pci_config_setup(dip, &dev->pcih) != DDI_SUCCESS) {
1387 data = pci_config_get16(dev->pcih, PCI_CONF_COMM);
1389 pci_config_put16(dev->pcih, PCI_CONF_COMM, data);
1391 if ((!solo_map_registers(dev)) ||
1392 (!solo_setup_interrupts(dev)) ||
1393 (!solo_alloc_engine(dev, 1)) ||
1394 (!solo_alloc_engine(dev, 2)) ||
1395 (!solo_add_controls(dev)) ||
1396 (!solo_init_hw(dev))) {
1400 if (audio_dev_register(dev->adev) != DDI_SUCCESS) {
1401 audio_dev_warn(dev->adev,
1406 (void) ddi_intr_enable(dev->ihandle);
1412 solo_release_resources(dev);
1417 solo_detach(solo_dev_t *dev)
1419 if (audio_dev_unregister(dev->adev) != DDI_SUCCESS) {
1423 solo_release_resources(dev);
1430 solo_dev_t *dev;
1437 if ((dev = ddi_get_driver_private(dip)) == NULL) {
1440 return (solo_resume(dev));
1450 solo_dev_t *dev;
1452 if ((dev = ddi_get_driver_private(dip)) == NULL) {
1458 return (solo_detach(dev));
1461 return (solo_suspend(dev));
1470 solo_dev_t *dev;
1472 dev = ddi_get_driver_private(dip);
1474 solo_aud1_stop(&dev->rec);
1475 solo_aud2_stop(&dev->play);
1477 solo_setmixer(dev, 0, 0);
1478 PORT_WR8(dev->io, 0x7, 0); /* disable all irqs */