Lines Matching refs:chan
48 static void ath9k_hw_set_regs(struct ath_hal *ah, struct ath9k_channel *chan,
54 struct ath9k_channel *chan);
56 struct ath9k_channel *chan);
73 struct ath9k_channel *chan = ah->ah_curchan;
75 if (chan && IS_CHAN_HT40(chan))
94 struct ath9k_channel *chan = ah->ah_curchan;
96 if (chan && IS_CHAN_HT40(chan))
104 ath9k_hw_chan2wmode(struct ath_hal *ah, const struct ath9k_channel *chan)
106 if (IS_CHAN_B(chan))
108 if (IS_CHAN_G(chan))
265 struct ath9k_channel *chan,
271 if (!IS_CHAN_HT40(chan)) {
273 centers->synth_center = chan->channel;
277 if ((chan->chanmode == CHANNEL_A_HT40PLUS) ||
278 (chan->chanmode == CHANNEL_G_HT40PLUS)) {
280 chan->channel + HT40_CHANNEL_CENTER_SHIFT;
284 chan->channel - HT40_CHANNEL_CENTER_SHIFT;
1040 ath9k_hw_init_bb(struct ath_hal *ah, struct ath9k_channel *chan)
1045 if (IS_CHAN_B(chan))
1074 ath9k_hw_init_pll(struct ath_hal *ah, struct ath9k_channel *chan)
1079 if (chan && IS_CHAN_5GHZ(chan))
1087 if (chan && IS_CHAN_HALF_RATE(chan))
1089 else if (chan && IS_CHAN_QUARTER_RATE(chan))
1092 if (chan && IS_CHAN_5GHZ(chan)) {
1097 if (((chan->channel % 20) == 0) ||
1098 ((chan->channel % 10) == 0))
1111 if (chan && IS_CHAN_HALF_RATE(chan))
1113 else if (chan && IS_CHAN_QUARTER_RATE(chan))
1116 if (chan && IS_CHAN_5GHZ(chan))
1123 if (chan && IS_CHAN_HALF_RATE(chan))
1125 else if (chan && IS_CHAN_QUARTER_RATE(chan))
1128 if (chan && IS_CHAN_5GHZ(chan))
1337 ath9k_hw_override_ini(struct ath_hal *ah, struct ath9k_channel *chan)
1408 struct ath9k_channel *chan,
1416 switch (chan->chanmode) {
1441 "%s: err: unknow chan->chanmode\n", __func__));
1449 ath9k_hw_set_addac(ah, chan);
1519 if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) {
1525 ath9k_hw_override_ini(ah, chan);
1526 ath9k_hw_set_regs(ah, chan, macmode);
1529 status = ath9k_hw_set_txpower(ah, chan,
1530 ath9k_regd_get_ctl(ah, chan),
1531 ath9k_regd_get_antenna_allowed(ah, chan),
1532 chan->maxRegTxPower * 2,
1542 if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
1555 ath9k_hw_set_rfmode(struct ath_hal *ah, struct ath9k_channel *chan)
1559 if (chan == NULL)
1562 rfMode |= (IS_CHAN_B(chan) || IS_CHAN_G(chan))
1566 rfMode |= (IS_CHAN_5GHZ(chan)) ?
1569 if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan))
1657 struct ath9k_channel *chan)
1663 if (IS_CHAN_HALF_RATE(chan))
1665 else if (IS_CHAN_QUARTER_RATE(chan))
1668 ath9k_hw_get_channel_centers(ah, chan, ¢ers);
1783 ath9k_hw_set_regs(struct ath_hal *ah, struct ath9k_channel *chan,
1797 if (IS_CHAN_HT40(chan)) {
1800 if ((chan->chanmode == CHANNEL_A_HT40PLUS) ||
1801 (chan->chanmode == CHANNEL_G_HT40PLUS))
1817 struct ath9k_channel *chan)
1829 ath9k_hw_init_pll(ah, chan);
1831 ath9k_hw_set_rfmode(ah, chan);
1837 ath9k_hw_check_chan(struct ath_hal *ah, struct ath9k_channel *chan)
1839 if (!(IS_CHAN_2GHZ(chan) ^ IS_CHAN_5GHZ(chan))) {
1843 __func__, chan->channel, chan->channelFlags));
1847 if (!IS_CHAN_OFDM(chan) &&
1848 !IS_CHAN_B(chan) &&
1849 !IS_CHAN_HT20(chan) &&
1850 !IS_CHAN_HT40(chan)) {
1854 __func__, chan->channel, chan->channelFlags));
1858 return (ath9k_regd_check_channel(ah, chan));
1863 struct ath9k_channel *chan,
1887 ath9k_hw_set_regs(ah, chan, macmode);
1890 if (!(ath9k_hw_ar9280_set_channel(ah, chan))) {
1896 if (!(ath9k_hw_set_channel(ah, chan))) {
1904 if (ath9k_hw_set_txpower(ah, chan,
1905 ath9k_regd_get_ctl(ah, chan),
1906 ath9k_regd_get_antenna_allowed(ah, chan),
1907 chan->maxRegTxPower * 2,
1917 if (IS_CHAN_B(chan))
1926 if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))
1927 ath9k_hw_set_delta_slope(ah, chan);
1930 ath9k_hw_9280_spur_mitigate(ah, chan);
1932 ath9k_hw_spur_mitigate(ah, chan);
1934 if (!chan->oneTimeCalsDone)
1935 chan->oneTimeCalsDone = B_TRUE;
1941 ath9k_hw_9280_spur_mitigate(struct ath_hal *ah, struct ath9k_channel *chan)
1967 boolean_t is2GHz = IS_CHAN_2GHZ(chan);
1972 ath9k_hw_get_channel_centers(ah, chan, ¢ers);
1988 if (IS_CHAN_HT40(chan)) {
2027 if (IS_CHAN_HT40(chan)) {
2040 if (IS_CHAN_HT40(chan))
2049 denominator = IS_CHAN_2GHZ(chan) ? 44 : 40;
2192 ath9k_hw_spur_mitigate(struct ath_hal *ah, struct ath9k_channel *chan)
2215 boolean_t is2GHz = IS_CHAN_2GHZ(chan);
2224 cur_bb_spur = cur_bb_spur - (chan->channel * 10);
2254 denominator = IS_CHAN_2GHZ(chan) ? 440 : 400;
2394 ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
2417 if (ath9k_hw_check_chan(ah, chan) == NULL) {
2420 __func__, chan->channel, chan->channelFlags));
2438 (chan->channel != ah->ah_curchan->channel) &&
2439 ((chan->channelFlags & CHANNEL_ALL) ==
2441 (!AR_SREV_9280(ah) || (!IS_CHAN_A_5MHZ_SPACED(chan) &&
2444 if (ath9k_hw_channel_change(ah, chan, macmode)) {
2463 if (!ath9k_hw_chip_reset(ah, chan)) {
2474 if (IS_CHAN_5GHZ(chan))
2482 ecode = ath9k_hw_process_ini(ah, chan, macmode);
2488 if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))
2489 ath9k_hw_set_delta_slope(ah, chan);
2492 ath9k_hw_9280_spur_mitigate(ah, chan);
2494 ath9k_hw_spur_mitigate(ah, chan);
2496 if (!ath9k_hw_eeprom_set_board_values(ah, chan)) {
2503 ath9k_hw_decrease_chain_power(ah, chan);
2527 if (!(ath9k_hw_ar9280_set_channel(ah, chan))) {
2535 if (!(ath9k_hw_set_channel(ah, chan))) {
2572 ath9k_hw_init_bb(ah, chan);
2574 if (!ath9k_hw_init_cal(ah, chan)) {
3856 struct ath9k_channel *chan = ah->ah_curchan;
3861 halNumAntConfig = IS_CHAN_2GHZ(chan) ?
3865 if (!ath9k_hw_get_eeprom_antenna_cfg(ah, chan,
3891 struct ath9k_channel *chan,
3991 struct ath9k_channel *chan = ah->ah_curchan;
3996 if (ath9k_hw_set_txpower(ah, chan,
3997 ath9k_regd_get_ctl(ah, chan),
3998 ath9k_regd_get_antenna_allowed(ah, chan),
3999 chan->maxRegTxPower * 2,