Lines Matching refs:SM
1062 SM(2, AR_QOS_NO_ACK_TWO_BIT) |
1063 SM(5, AR_QOS_NO_ACK_BIT_OFF) |
1064 SM(0, AR_QOS_NO_ACK_BYTE_OFF));
1085 pll = SM(0x5, AR_RTC_9160_PLL_REFDIV);
1088 pll |= SM(0x1, AR_RTC_9160_PLL_CLKSEL);
1090 pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL);
1093 pll |= SM(0x28, AR_RTC_9160_PLL_DIV);
1104 pll |= SM(0x2c, AR_RTC_9160_PLL_DIV);
1109 pll = SM(0x5, AR_RTC_9160_PLL_REFDIV);
1112 pll |= SM(0x1, AR_RTC_9160_PLL_CLKSEL);
1114 pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL);
1117 pll |= SM(0x50, AR_RTC_9160_PLL_DIV);
1119 pll |= SM(0x58, AR_RTC_9160_PLL_DIV);
1124 pll |= SM(0x1, AR_RTC_PLL_CLKSEL);
1126 pll |= SM(0x2, AR_RTC_PLL_CLKSEL);
1129 pll |= SM(0xa, AR_RTC_PLL_DIV);
1131 pll |= SM(0xb, AR_RTC_PLL_DIV);
2024 SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
2053 SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
2054 SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
2248 SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
2258 SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
2259 SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
3402 SM((CAB_TIMEOUT_VAL << 3), AR_SLEEP1_CAB_TIMEOUT) |
3411 SM(beacontimeout, AR_SLEEP2_BEACON_TIMEOUT));