Lines Matching defs:regChainOffset
1042 uint32_t reg32, regOffset, regChainOffset;
1091 regChainOffset = (i == 1) ? 0x2000 : 0x1000;
1093 regChainOffset = i * 0x1000;
1109 AR_PHY_TPCRG5 + regChainOffset,
1122 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;
1132 i, regChainOffset, regOffset,
1170 uint32_t reg32, regOffset, regChainOffset;
1211 regChainOffset = (i == 1) ? 0x2000 : 0x1000;
1213 regChainOffset = i * 0x1000;
1225 REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset,
1238 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;
1248 i, regChainOffset, regOffset,
2203 int i, regChainOffset;
2223 regChainOffset = (i == 1) ? 0x2000 : 0x1000;
2225 regChainOffset = i * 0x1000;
2227 REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,
2230 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
2231 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) &
2247 regChainOffset,
2253 regChainOffset,
2259 regChainOffset,
2265 regChainOffset,
2272 regChainOffset,
2275 regChainOffset) &
2282 regChainOffset,
2285 regChainOffset) &
2294 regChainOffset,
2299 regChainOffset,
2304 AR_PHY_RXGAIN + regChainOffset,
2307 regChainOffset) &
2313 regChainOffset,
2316 regChainOffset) &
2435 int regChainOffset;
2450 regChainOffset = 0;
2451 REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,
2454 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
2455 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) &
2464 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
2466 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
2468 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
2471 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
2475 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,
2477 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,