Lines Matching defs:soft_state
45 static void hci1394_isr_bus_reset(hci1394_state_t *soft_state);
46 static void hci1394_isr_self_id(hci1394_state_t *soft_state);
47 static void hci1394_isr_isoch_ir(hci1394_state_t *soft_state);
48 static void hci1394_isr_isoch_it(hci1394_state_t *soft_state);
49 static void hci1394_isr_atreq_complete(hci1394_state_t *soft_state);
50 static void hci1394_isr_arresp(hci1394_state_t *soft_state);
51 static void hci1394_isr_arreq(hci1394_state_t *soft_state);
52 static void hci1394_isr_atresp_complete(hci1394_state_t *soft_state);
61 hci1394_isr_init(hci1394_state_t *soft_state)
66 ASSERT(soft_state != NULL);
70 status = ddi_intr_hilevel(soft_state->drvinfo.di_dip, 0);
81 status = ddi_get_iblock_cookie(soft_state->drvinfo.di_dip, 0,
82 &soft_state->drvinfo.di_iblock_cookie);
103 hci1394_isr_fini(hci1394_state_t *soft_state)
105 ASSERT(soft_state != NULL);
119 hci1394_isr_handler_init(hci1394_state_t *soft_state)
123 ASSERT(soft_state != NULL);
126 status = ddi_add_intr(soft_state->drvinfo.di_dip, 0, NULL, NULL,
127 hci1394_isr, (caddr_t)soft_state);
143 hci1394_isr_handler_fini(hci1394_state_t *soft_state)
145 ASSERT(soft_state != NULL);
148 ddi_remove_intr(soft_state->drvinfo.di_dip, 0,
149 soft_state->drvinfo.di_iblock_cookie);
159 hci1394_isr_mask_setup(hci1394_state_t *soft_state)
161 ASSERT(soft_state != NULL);
166 hci1394_ohci_ir_intr_disable(soft_state->ohci, 0xFFFFFFFF);
167 hci1394_ohci_ir_intr_clear(soft_state->ohci, 0xFFFFFFFF);
168 hci1394_ohci_it_intr_disable(soft_state->ohci, 0xFFFFFFFF);
169 hci1394_ohci_it_intr_clear(soft_state->ohci, 0xFFFFFFFF);
170 hci1394_ohci_intr_disable(soft_state->ohci, 0xFFFFFFFF);
171 hci1394_ohci_intr_clear(soft_state->ohci, 0xFFFFFFFF);
174 hci1394_ohci_intr_enable(soft_state->ohci,
198 hci1394_state_t *soft_state;
205 soft_state = (hci1394_state_t *)parm;
207 ASSERT(soft_state != NULL);
210 if (hci1394_state(&soft_state->drvinfo) == HCI1394_SHUTDOWN)
217 interrupt_event = hci1394_ohci_intr_asserted(soft_state->ohci);
221 hci1394_isr_bus_reset(soft_state);
225 hci1394_isr_self_id(soft_state);
229 hci1394_isr_isoch_it(soft_state);
233 hci1394_isr_isoch_ir(soft_state);
237 hci1394_isr_atreq_complete(soft_state);
241 hci1394_isr_arresp(soft_state);
245 hci1394_isr_arreq(soft_state);
249 hci1394_isr_atresp_complete(soft_state);
253 hci1394_ohci_isr_cycle64seconds(soft_state->ohci);
257 h1394_error_detected(soft_state->drvinfo.di_sl_private,
261 soft_state->drvinfo.di_instance);
262 hci1394_shutdown(soft_state->drvinfo.di_dip);
266 hci1394_isoch_cycle_lost(soft_state);
270 hci1394_isoch_cycle_inconsistent(soft_state);
274 hci1394_ohci_intr_clear(soft_state->ohci,
277 hci1394_csr_state_bclr(soft_state->csr,
279 h1394_error_detected(soft_state->drvinfo.di_sl_private,
284 hci1394_ohci_postwr_addr(soft_state->ohci,
286 h1394_error_detected(soft_state->drvinfo.di_sl_private,
291 hci1394_ohci_isr_phy(soft_state->ohci);
295 hci1394_ohci_intr_clear(soft_state->ohci,
297 h1394_error_detected(soft_state->drvinfo.di_sl_private,
316 (hci1394_state(&soft_state->drvinfo) ==
318 if (soft_state->drvinfo.di_gencnt !=
319 hci1394_ohci_current_busgen(soft_state->ohci)) {
331 soft_state->ohci);
347 hci1394_isr_bus_reset(hci1394_state_t *soft_state)
352 ASSERT(soft_state != NULL);
364 status = hci1394_state_set(&soft_state->drvinfo, HCI1394_BUS_RESET);
366 hci1394_ohci_intr_master_disable(soft_state->ohci);
375 soft_state->drvinfo.di_gencnt =
376 hci1394_ohci_current_busgen(soft_state->ohci);
378 soft_state->drvinfo.di_stats.st_bus_reset_count++;
387 hci1394_ohci_intr_disable(soft_state->ohci, OHCI_INTR_BUS_RESET);
390 hci1394_async_atreq_reset(soft_state->async);
391 hci1394_async_atresp_reset(soft_state->async);
394 h1394_bus_reset(soft_state->drvinfo.di_sl_private,
395 (void **)&soft_state->sl_selfid_buf);
409 hci1394_isr_self_id(hci1394_state_t *soft_state)
423 ASSERT(soft_state != NULL);
426 soft_state->drvinfo.di_stats.st_selfid_count++;
432 if (hci1394_state(&soft_state->drvinfo) != HCI1394_BUS_RESET) {
433 hci1394_isr_bus_reset(soft_state);
443 status = hci1394_ohci_phy_read(soft_state->ohci, 5, &phy_status);
450 status = hci1394_ohci_phy_write(soft_state->ohci, 5,
461 hci1394_ohci_intr_enable(soft_state->ohci,
467 if (hci1394_ohci_at_active(soft_state->ohci) == B_TRUE) {
474 hci1394_ohci_intr_clear(soft_state->ohci, (OHCI_INTR_BUS_RESET |
478 hci1394_ohci_nodeid_info(soft_state->ohci, &node_id, &nodeid_error);
486 hci1394_ohci_selfid_sync(soft_state->ohci);
489 hci1394_ohci_selfid_info(soft_state->ohci,
490 &soft_state->drvinfo.di_gencnt, &selfid_size, &selfid_error);
513 if (hci1394_ohci_selfid_buf_current(soft_state->ohci) == B_FALSE) {
528 hci1394_ohci_selfid_read(soft_state->ohci, index + 1,
529 &soft_state->sl_selfid_buf[index]);
536 if (soft_state->halinfo.phy == H1394_PHY_1995) {
538 (uintptr_t)soft_state->sl_selfid_buf +
540 status = hci1394_ohci_phy_info(soft_state->ohci,
558 hci1394_async_flush(soft_state->async);
565 if (soft_state->drvinfo.di_gencnt !=
566 hci1394_ohci_current_busgen(soft_state->ohci)) {
575 hci1394_csr_bus_reset(soft_state->csr);
581 hci1394_isoch_error_ints_enable(soft_state);
591 h1394_self_ids(soft_state->drvinfo.di_sl_private,
592 soft_state->sl_selfid_buf, 0, node_id,
593 soft_state->drvinfo.di_gencnt);
606 status = hci1394_state_set(&soft_state->drvinfo,
609 hci1394_ohci_intr_master_disable(soft_state->ohci);
617 h1394_self_ids(soft_state->drvinfo.di_sl_private,
618 soft_state->sl_selfid_buf, selfid_size,
619 node_id, soft_state->drvinfo.di_gencnt);
632 status = hci1394_state_set(&soft_state->drvinfo,
635 hci1394_ohci_intr_master_disable(soft_state->ohci);
640 "bus", soft_state->drvinfo.di_instance);
644 hci1394_ohci_intr_enable(soft_state->ohci, OHCI_INTR_BUS_RESET);
657 hci1394_isr_isoch_ir(hci1394_state_t *soft_state)
666 ASSERT(soft_state != NULL);
670 num_ir_contexts = hci1394_isoch_recv_count_get(soft_state->isoch);
677 while ((ev = hci1394_ohci_ir_intr_asserted(soft_state->ohci)) != 0) {
680 hci1394_ohci_ir_intr_clear(soft_state->ohci, ev);
690 soft_state->isoch, i);
691 hci1394_ixl_interrupt(soft_state, ctxtp,
708 hci1394_isr_isoch_it(hci1394_state_t *soft_state)
717 ASSERT(soft_state != NULL);
721 num_it_contexts = hci1394_isoch_xmit_count_get(soft_state->isoch);
729 while ((ev = hci1394_ohci_it_intr_asserted(soft_state->ohci)) != 0) {
732 hci1394_ohci_it_intr_clear(soft_state->ohci, ev);
742 soft_state->isoch, i);
743 hci1394_ixl_interrupt(soft_state, ctxtp,
759 hci1394_isr_atreq_complete(hci1394_state_t *soft_state)
765 ASSERT(soft_state != NULL);
769 hci1394_ohci_intr_clear(soft_state->ohci, OHCI_INTR_REQ_TX_CMPLT);
781 status = hci1394_async_atreq_process(soft_state->async, B_FALSE,
802 hci1394_isr_arresp(hci1394_state_t *soft_state)
808 ASSERT(soft_state != NULL);
811 hci1394_ohci_intr_clear(soft_state->ohci, OHCI_INTR_RSPKT);
823 status = hci1394_async_arresp_process(soft_state->async,
841 hci1394_isr_arreq(hci1394_state_t *soft_state)
847 ASSERT(soft_state != NULL);
850 hci1394_ohci_intr_clear(soft_state->ohci, OHCI_INTR_RQPKT);
860 status = hci1394_async_arreq_process(soft_state->async,
881 hci1394_isr_atresp_complete(hci1394_state_t *soft_state)
887 ASSERT(soft_state != NULL);
891 hci1394_ohci_intr_clear(soft_state->ohci, OHCI_INTR_RESP_TX_CMPLT);
905 status = hci1394_async_atresp_process(soft_state->async,