Lines Matching refs:start
232 uint64_t start, end, i;
255 start = (off < dn->dn_datablksz) ? 0 : 1;
257 if (start == 0 && (off > 0 || len < dn->dn_datablksz)) {
268 start = off >> dn->dn_datablkshift;
271 err = dmu_tx_check_ioerr(zio, dn, 0, start);
278 if (end != start && end <= dn->dn_maxblkid &&
288 for (i = (start>>shft)+1; i < end>>shft; i++) {
323 if (start <= dn->dn_maxblkid) {
327 while (start <= dn->dn_maxblkid) {
331 err = dbuf_hold_impl(dn, 0, start,
340 dmu_tx_count_twig(txh, dn, db, 0, start, B_FALSE,
343 if (++start > end) {
369 start = P2ALIGN(off, 1ULL << max_bs);
372 end - start + 1, FTAG);
374 start >>= min_bs;
384 start >>= epbs;
386 ASSERT3U(end, >=, start);
388 (end - start + 1) << max_ibs, FTAG);
389 if (start != 0) {
701 uint64_t start = off >> shift;
712 start = end = 0;
716 for (uint64_t i = start; i <= end; i++) {
1030 * The percentage of dirty data at which we start to delay is defined by
1032 * zfs_vdev_async_write_active_max_dirty_percent so that we only start to
1097 * the delay start to increase rapidly. The goal of a properly tuned system