Cross Reference: /illumos-gate/usr/src/lib/libm/common/m9x/__fex

Lines Matching defs:inst
60  * Decode an SSE instruction.  Fill in *inst and return the length of the
64 __fex_parse_sse(ucontext_t *uap, sseinst_t *inst)
100 		inst->op = (int)cvtsi2ss + simd + dbl;
102 			inst->op = (int)inst->op + (rex & 8);
106 		inst->op = (int)cvttss2si + simd + dbl;
108 			inst->op = (int)inst->op + (rex & 8);
112 		inst->op = (int)cvtss2si + simd + dbl;
114 			inst->op = (int)inst->op + (rex & 8);
121 		inst->op = (int)ucomiss + dbl;
128 		inst->op = (int)comiss + dbl;
132 		inst->op = (int)sqrtss + simd + dbl;
136 		inst->op = (int)addss + simd + dbl;
140 		inst->op = (int)mulss + simd + dbl;
144 		inst->op = (int)cvtss2sd + simd + dbl;
150 				inst->op = cvtps2dq;
154 			inst->op = (simd)? cvtdq2ps : cvttps2dq;
159 		inst->op = (int)subss + simd + dbl;
163 		inst->op = (int)minss + simd + dbl;
167 		inst->op = (int)divss + simd + dbl;
171 		inst->op = (int)maxss + simd + dbl;
175 		inst->op = (int)cmpss + simd + dbl;
181 				inst->op = cvttpd2dq;
185 			inst->op = (dbl)? cvtpd2dq : cvtdq2pd;
196 	if (inst->op == cvtss2si || inst->op == cvttss2si ||
197 	    inst->op == cvtsd2si || inst->op == cvttsd2si ||
198 	    inst->op == cvtss2siq || inst->op == cvttss2siq ||
199 	    inst->op == cvtsd2siq || inst->op == cvttsd2siq) {
202 		inst->op1 = (sseoperand_t *)&uap->uc_mcontext.gregs[regno(r)];
203 	} else if (inst->op == cvtps2pi || inst->op == cvttps2pi ||
204 	    inst->op == cvtpd2pi || inst->op == cvttpd2pi) {
207 		inst->op1 = (sseoperand_t *)&uap->uc_mcontext.fpregs.fp_reg_set.
210 		inst->op1 = (sseoperand_t *)(10 * ((modrm >> 3) & 7) +
217 		inst->op1 = (sseoperand_t *)&uap->uc_mcontext.fpregs.
222 		if (inst->op == cvtsi2ss || inst->op == cvtsi2sd ||
223 		    inst->op == cvtsi2ssq || inst->op == cvtsi2sdq) {
226 			inst->op2 = (sseoperand_t *)&uap->uc_mcontext.
228 		} else if (inst->op == cvtpi2ps || inst->op == cvtpi2pd) {
231 			inst->op2 = (sseoperand_t *)&uap->uc_mcontext.fpregs.
234 			inst->op2 = (sseoperand_t *)(10 * (modrm & 7) +
241 			inst->op2 = (sseoperand_t *)&uap->uc_mcontext.fpregs.
248 		if (inst->op == cmpss || inst->op == cmpps ||
249 		    inst->op == cmpsd || inst->op == cmppd)
251 		inst->op2 = (sseoperand_t *)(ip + r + *(int *)(ip + i));
254 		inst->op2 = (sseoperand_t *)(*(int *)(ip + i));
289 		inst->op2 = (sseoperand_t *)addr;
292 	if (inst->op == cmpss || inst->op == cmpps || inst->op == cmpsd ||
293 	    inst->op == cmppd) {
295 		inst->imm = ip[i++];
342 __fex_get_sse_invalid_type(sseinst_t *inst)
347 	t2 = ((int)inst->op & DOUBLE)? my_fp_class(&inst->op2->d[0]) :
348 	    my_fp_classf(&inst->op2->f[0]);
353 	switch (inst->op) {
377 	t1 = ((int)inst->op & DOUBLE)? my_fp_class(&inst->op1->d[0]) :
378 	    my_fp_classf(&inst->op1->f[0]);
383 	switch (inst->op) {
475  * This routine does not work if the instruction specified by *inst
479 __fex_get_sse_op(ucontext_t *uap, sseinst_t *inst, fex_info_t *info)
490 	if ((int)inst->op & DOUBLE) {
491 		if (inst->op == cvtsi2sd) {
493 			info->op1.val.i = inst->op2->i[0];
495 		} else if (inst->op == cvtsi2sdq) {
497 			info->op1.val.l = inst->op2->l[0];
499 		} else if (inst->op == sqrtsd || inst->op == cvtsd2ss ||
500 		    inst->op == cvttsd2si || inst->op == cvtsd2si ||
501 		    inst->op == cvttsd2siq || inst->op == cvtsd2siq) {
503 			info->op1.val.d = inst->op2->d[0];
507 			info->op1.val.d = inst->op1->d[0];
509 			info->op2.val.d = inst->op2->d[0];
512 		switch (inst->op) {
516 			switch (inst->imm & 3) {
536 			if (inst->imm & 4)
648 		if (inst->op == cvtsi2ss) {
650 			info->op1.val.i = inst->op2->i[0];
652 		} else if (inst->op == cvtsi2ssq) {
654 			info->op1.val.l = inst->op2->l[0];
656 		} else if (inst->op == sqrtss || inst->op == cvtss2sd ||
657 		    inst->op == cvttss2si || inst->op == cvtss2si ||
658 		    inst->op == cvttss2siq || inst->op == cvtss2siq) {
660 			info->op1.val.f = inst->op2->f[0];
664 			info->op1.val.f = inst->op1->f[0];
666 			info->op2.val.f = inst->op2->f[0];
669 		switch (inst->op) {
673 			switch (inst->imm & 3) {
693 			if (inst->imm & 4)
812 		return __fex_get_sse_invalid_type(inst);
833  * This routine does not work if the instruction specified by *inst
837 __fex_get_simd_op(ucontext_t *uap, sseinst_t *inst, enum fex_exception *e,
846 	switch (inst->op) {
849 		dummy.imm = inst->imm;
851 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
852 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
860 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
861 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
869 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
870 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
878 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
879 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
887 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
888 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
896 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
897 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
905 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
906 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
914 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
915 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
923 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
924 			dummy.op2 = (sseoperand_t *)&inst->op2->i[i];
932 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
933 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
941 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
942 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
950 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
951 			dummy.op2 = (sseoperand_t *)&inst->op2->i[i];
959 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
960 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
968 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
969 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
976 		dummy.imm = inst->imm;
978 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
979 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
987 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
988 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
996 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
997 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1005 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1006 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1014 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1015 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1023 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1024 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1032 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1033 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1041 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1042 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1051 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1052 			dummy.op2 = (sseoperand_t *)&inst->op2->i[i];
1061 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
1062 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1071 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
1072 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1080 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1081 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1089 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1090 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1100  * SSE instruction specified by *inst.  If no result is given but the
1103  * This routine does not work if the instruction specified by *inst
1107 __fex_st_sse_result(ucontext_t *uap, sseinst_t *inst, enum fex_exception e,
1117 	if (inst->op == ucomiss || inst->op == comiss ||
1118 	    inst->op == ucomisd || inst->op == comisd) {
1139 			(void) __fex_get_sse_op(uap, inst, info);
1146 		if (inst->op == cvtsd2ss) {
1148 			info->op1.val.d = inst->op2->d[0];
1153 		} else if ((int)inst->op & DOUBLE) {
1155 			info->op1.val.d = inst->op1->d[0];
1157 			info->op2.val.d = inst->op2->d[0];
1159 			switch (inst->op) {
1185 			info->op1.val.f = inst->op1->f[0];
1187 			info->op2.val.f = inst->op2->f[0];
1189 			switch (inst->op) {
1218 	if (inst->op == cmpss || inst->op == cvttss2si || inst->op == cvtss2si
1219 	    || inst->op == cvttsd2si || inst->op == cvtsd2si) {
1244 		inst->op1->i[0] = i;
1245 	} else if (inst->op == cmpsd || inst->op == cvttss2siq ||
1246 	    inst->op == cvtss2siq || inst->op == cvttsd2siq ||
1247 	    inst->op == cvtsd2siq) {
1272 		inst->op1->l[0] = l;
1273 	} else if ((((int)inst->op & DOUBLE) && inst->op != cvtsd2ss) ||
1274 	    inst->op == cvtss2sd) {
1299 		inst->op1->d[0] = d;
1325 		inst->op1->f[0] = f;
1332  * of the SIMD SSE instruction specified by *inst.  If no result
1336  * This routine does not work if the instruction specified by *inst
1340 __fex_st_simd_result(ucontext_t *uap, sseinst_t *inst, enum fex_exception *e,
1347 	switch (inst->op) {
1350 		dummy.imm = inst->imm;
1352 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1353 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1361 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1362 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1370 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1371 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1379 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1380 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1388 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1389 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1397 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1398 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1406 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1407 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1415 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1416 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1424 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1425 			dummy.op2 = (sseoperand_t *)&inst->op2->i[i];
1433 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
1434 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1442 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
1443 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1451 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1452 			dummy.op2 = (sseoperand_t *)&inst->op2->i[i];
1460 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
1461 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1469 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
1470 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1477 		dummy.imm = inst->imm;
1479 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1480 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1488 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1489 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1497 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1498 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1506 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1507 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1515 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1516 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1524 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1525 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1533 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1534 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1542 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1543 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1552 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1553 			dummy.op2 = (sseoperand_t *)&inst->op2->i[i];
1562 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
1563 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1567 		if (inst->op == cvttpd2dq)
1568 			inst->op1->l[1] = 0ll;
1575 			dummy.op1 = (sseoperand_t *)&inst->op1->i[i];
1576 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1580 		if (inst->op == cvtpd2dq)
1581 			inst->op1->l[1] = 0ll;
1587 			dummy.op1 = (sseoperand_t *)&inst->op1->d[i];
1588 			dummy.op2 = (sseoperand_t *)&inst->op2->f[i];
1596 			dummy.op1 = (sseoperand_t *)&inst->op1->f[i];
1597 			dummy.op2 = (sseoperand_t *)&inst->op2->d[i];
1601 		inst->op1->l[1] = 0ll;