Lines Matching refs:uc_mcontext

140 #define fpreg(u,x)	*(long double *)(10*(x)+(char*)&(u)->uc_mcontext.fpregs.fp_reg_set.fpchip_state.st)
142 #define fpreg(u,x) *(long double *)(10*(x)+(char*)&(u)->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[7])
153 sw = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.status;
155 cw = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.cw;
157 cw = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[CW];
246 op = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.fop >> 16;
247 ea = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.rdp;
249 op = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[OP] >> 16;
250 ea = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[EA];
579 sw = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.status;
581 op = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.fop >> 16;
582 ea = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.rdp;
584 op = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[OP] >> 16;
585 ea = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[EA];
1175 top = (uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.sw >> 10)
1177 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.fctw |= (3 << top);
1179 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.sw =
1180 (uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.sw & ~0x3800)
1183 top = (uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[SW] >> 10)
1185 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[TW] |= (3 << top);
1187 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[SW] =
1188 (uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[SW] & ~0x3800)
1207 top = (uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.sw >> 10)
1210 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.fctw &= ~(3 << top);
1211 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.sw =
1212 (uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.sw & ~0x3800)
1215 top = (uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[SW] >> 10)
1218 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[TW] &= ~(3 << top);
1219 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[SW] =
1220 (uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[SW] & ~0x3800)
1246 op = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.fop >> 16;
1247 ea = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.rdp; /*???*/
1249 op = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[OP] >> 16;
1250 ea = uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[EA];
1273 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.sw |= 0x4500;
1275 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[SW] |= 0x4500;
1297 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.sw |= 0x4500;
1299 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[SW] |= 0x4500;
1308 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.sw |= 0x4500;
1310 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[SW] |= 0x4500;
1319 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.sw |= 0x4500;
1321 uap->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state[SW] |= 0x4500;
1331 uap->uc_mcontext.gregs[REG_PS] |= 0x45;
1333 uap->uc_mcontext.gregs[EFL] |= 0x45;
1341 uap->uc_mcontext.gregs[REG_PS] |= 0x45;
1343 uap->uc_mcontext.gregs[EFL] |= 0x45;