Lines Matching defs:writel
158 #undef writel
164 #define writel outl
309 writel(0x00000001, ioaddr + PCIBusCfg);
313 writel(virt_to_bus(w840private.rx_ring), ioaddr + RxRingPtr);
314 writel(virt_to_bus(w840private.tx_ring), ioaddr + TxRingPtr);
331 writel(0xE010, ioaddr + PCIBusCfg);
333 writel(0, ioaddr + RxStartDemand);
340 writel(0x1A0F5, ioaddr + IntrStatus);
341 writel(0x1A0F5, ioaddr + IntrEnable);
356 writel(intr_stat & 0x001ffff, ioaddr + IntrStatus);
370 writel(0, ioaddr + RxStartDemand);
522 writel(0, ioaddr + TxStartDemand);
591 writel(w840private.csr6 &= ~0x20FA, ioaddr + NetworkConfig);
672 writel(0x00000001, ioaddr + PCIBusCfg);
737 writel(EE_ChipSelect, ee_addr);
742 writel(dataval, ee_addr);
744 writel(dataval | EE_ShiftClk, ee_addr);
747 writel(EE_ChipSelect, ee_addr);
750 writel(EE_ChipSelect | EE_ShiftClk, ee_addr);
753 writel(EE_ChipSelect, ee_addr);
758 writel(0, ee_addr);
787 writel(MDIO_WRITE1, mdio_addr);
789 writel(MDIO_WRITE1 | MDIO_ShiftClk, mdio_addr);
807 writel(dataval, mdio_addr);
809 writel(dataval | MDIO_ShiftClk, mdio_addr);
814 writel(MDIO_EnbIn, mdio_addr);
817 writel(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr);
840 writel(dataval, mdio_addr);
842 writel(dataval | MDIO_ShiftClk, mdio_addr);
847 writel(MDIO_EnbIn, mdio_addr);
849 writel(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr);
893 writel(mc_filter[0], ioaddr + MulticastFilter0);
894 writel(mc_filter[1], ioaddr + MulticastFilter1);
897 writel(w840private.csr6, ioaddr + NetworkConfig);