Cross Reference: /illumos-gate/usr/src/cmd/fm/eversholt/files/sparc/sun4v/zambezi.esc

Lines Matching refs:prop
105 prop fault.cpu.ultraSPARC-T2plus.chip@chip ->
169 prop error.asic.ultraSPARC-T2plus.interconnect.opu-u@interconnect ->
172 prop fault.asic.ultraSPARC-T2plus.interconnect.opu-u@interconnect ->
182 prop error.asic.ultraSPARC-T2plus.interconnect.opu-c@interconnect ->
185 prop fault.asic.ultraSPARC-T2plus.interconnect.opu-c@interconnect ->
193 prop error.cpu.ultraSPARC-T2plus.opu.protocol@chip[chip_num] (0) ->
316 prop upset.asic.ultraSPARC-T2plus.interconnect.lfu.ignore@interconnect ->
319 prop fault.asic.ultraSPARC-T2plus.interconnect.lfu-c@interconnect ->
322 prop fault.asic.ultraSPARC-T2plus.interconnect.lfu-f@interconnect ->
325 prop fault.asic.ultraSPARC-T2plus.interconnect.lfu-u@interconnect ->
344 prop error.asic.ultraSPARC-T2plus.interconnect.lfu-c@interconnect ->
366 prop upset.asic.ultraSPARC-T2plus.interconnect.lfu.crc.chip0@interconnect ->
370 prop upset.asic.ultraSPARC-T2plus.interconnect.lfu.replay.chip0@interconnect ->
391 prop upset.asic.ultraSPARC-T2plus.interconnect.lfu.crc.chip1@interconnect ->
395 prop upset.asic.ultraSPARC-T2plus.interconnect.lfu.replay.chip1@interconnect ->
416 prop upset.asic.ultraSPARC-T2plus.interconnect.lfu.crc.chip2@interconnect ->
420 prop upset.asic.ultraSPARC-T2plus.interconnect.lfu.replay.chip2@interconnect ->
441 prop upset.asic.ultraSPARC-T2plus.interconnect.lfu.crc.chip3@interconnect ->
445 prop upset.asic.ultraSPARC-T2plus.interconnect.lfu.replay.chip3@interconnect ->
454 prop error.asic.ultraSPARC-T2plus.interconnect.lfu-f@interconnect ->
462 prop error.cpu.ultraSPARC-T2plus.lfu-f.chip@chip[chip_num] (0) ->
471 prop error.cpu.ultraSPARC-T2plus.lfu-u.chip@chip[chip_num] (0) ->
495 prop error.asic.ultraSPARC-T2plus.interconnect.lfu-u@interconnect ->
513 prop error.asic.ultraSPARC-T2plus.interconnect.lfu.ignore@interconnect ->
527 prop error.cpu.ultraSPARC-T2plus.lfu-c.chip@chip[chip_num] (0) ->
628 prop fault.asic.fpga@motherboard ->
631 prop upset.asic.ultraSPARC-T2plus.interconnect.gpd.ignore@interconnect ->
634 prop fault.asic.ultraSPARC-T2plus.interconnect.gpd-u@interconnect ->
637 prop fault.asic.ultraSPARC-T2plus.interconnect.gpd-c@interconnect ->
650 prop error.cpu.ultraSPARC-T2plus.gpd-u.chip@chip[chip_num] (0) ->
662 prop error.cpu.ultraSPARC-T2plus.gpd-c.chip@chip[chip_num] (0) ->
682 prop error.asic.ultraSPARC-T2plus.interconnect.gpd-u@interconnect ->
694 prop error.asic.ultraSPARC-T2plus.interconnect.gpd.ignore@interconnect ->
724 prop error.asic.ultraSPARC-T2plus.interconnect.gpd-c@interconnect ->
744 prop error.asic.ultraSPARC-T2plus.interconnect.gpd@interconnect ->
754 prop error.asic.fpga@motherboard (0) ->
805 prop upset.asic.ultraSPARC-T2plus.interconnect.asu.ignore@interconnect ->
808 prop fault.asic.ultraSPARC-T2plus.interconnect.asu@interconnect ->
812 prop error.cpu.ultraSPARC-T2plus.asu.protocol@chip[chip_num] (0) ->
824 prop error.asic.ultraSPARC-T2plus.interconnect.asu.ignore@interconnect ->
836 prop error.asic.ultraSPARC-T2plus.interconnect.asu@interconnect ->