Lines Matching refs:define
32 #define SW_FIT 5000 /* No real fit rate, SW */
33 #define HV_FIT 5000 /* No real fit rate, SW */
34 #define SW_HV_MISMATCH_FIT 20000 /* No real fit rate, SW */
35 #define HB_FIT 400
36 #define HBUS_FIT 400
37 #define CPU_FIT 500
38 #define PCI_DEV_FIT 1000
39 #define PCIEX_DEV_FIT 1000
40 #define EBUS_FIT 1000
41 #define LINK_EVENTS_COUNT 10
42 #define LINK_EVENTS_TIME 1h
43 #define CE_EVENTS_COUNT 10
44 #define CE_EVENTS_TIME 1h
54 #define PF_NO_ERROR (1 << 0)
55 #define PF_CE (1 << 1)
56 #define MATCH_CE ((payloadprop("severity") == PF_CE) || \
60 #define MATCH_UNRECOGNIZED ((payloadprop("sysino") == 0) && \
67 #define IS_PRIMARY (payloadprop("primary"))
68 #define IS_SECONDARY (! payloadprop("primary"))
78 #define IMU_MATCH_BDF(b, d, f) \
466 #define PROP_PLAT_FRU "FRU"
467 #define GET_HB_FRU (confprop(asru(hostbridge/pciexrc), PROP_PLAT_FRU))
468 #define GET_PCIE_FRU (confprop(asru(pciexbus[b]/pciexdev[d]/pciexfn[0]), PROP_PLAT_FRU))
469 #define GET_PCI_FRU (confprop(asru(pcibus[b]/pcidev[d]/pcifn[0]), PROP_PLAT_FRU))